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| author | Luís Marques <luismarques@lowrisc.org> | 2019-11-10 16:04:43 +0000 |
|---|---|---|
| committer | Luís Marques <luismarques@lowrisc.org> | 2019-11-10 16:09:14 +0000 |
| commit | 1c737f54bee9df81c63ddf6ee2ad1d23a93c0ba0 (patch) | |
| tree | 308604f3e58ad353833b7aa69754ce83ad7e0cfb /llvm/test/CodeGen/RISCV/large-stack.ll | |
| parent | be0fead7bffbf65c519ca50c89584e65dcf18793 (diff) | |
| download | bcm5719-llvm-1c737f54bee9df81c63ddf6ee2ad1d23a93c0ba0.tar.gz bcm5719-llvm-1c737f54bee9df81c63ddf6ee2ad1d23a93c0ba0.zip | |
[RISCV] Fix CFA when doing split sp adjustment with fp
Summary: When using the split sp adjustment and using the frame-pointer
we were still emitting CFI CFA directives based on the sp value. The
final sp-based offset also didn't reflect the two-stage sp adjust. There
remain CFI issues that aren't related to the split sp adjustment, and
thus will be addressed in a separate patch.
Reviewers: asb, lenary, shiva0217
Reviewed By: lenary, shiva0217
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D69385
Diffstat (limited to 'llvm/test/CodeGen/RISCV/large-stack.ll')
| -rw-r--r-- | llvm/test/CodeGen/RISCV/large-stack.ll | 8 |
1 files changed, 2 insertions, 6 deletions
diff --git a/llvm/test/CodeGen/RISCV/large-stack.ll b/llvm/test/CodeGen/RISCV/large-stack.ll index 48e09eb66da..7808698ae2b 100644 --- a/llvm/test/CodeGen/RISCV/large-stack.ll +++ b/llvm/test/CodeGen/RISCV/large-stack.ll @@ -32,13 +32,11 @@ define void @test() { ; RV32I-WITHFP-NEXT: lui a0, 74565 ; RV32I-WITHFP-NEXT: addi a0, a0, -352 ; RV32I-WITHFP-NEXT: sub sp, sp, a0 -; RV32I-WITHFP-NEXT: .cfi_def_cfa_offset 305419920 ; RV32I-WITHFP-NEXT: lui a0, 74565 ; RV32I-WITHFP-NEXT: addi a0, a0, -352 ; RV32I-WITHFP-NEXT: add sp, sp, a0 -; RV32I-WITHFP-NEXT: .cfi_def_cfa_offset 2032 ; RV32I-WITHFP-NEXT: lw s0, 2024(sp) -; RV32I-WITHFP-NEXT: .cfi_def_cfa sp, 305419920 +; RV32I-WITHFP-NEXT: .cfi_def_cfa sp, 2032 ; RV32I-WITHFP-NEXT: lw ra, 2028(sp) ; RV32I-WITHFP-NEXT: .cfi_restore ra ; RV32I-WITHFP-NEXT: .cfi_restore s0 @@ -105,7 +103,6 @@ define void @test_emergency_spill_slot(i32 %a) { ; RV32I-WITHFP-NEXT: lui a1, 97 ; RV32I-WITHFP-NEXT: addi a1, a1, 688 ; RV32I-WITHFP-NEXT: sub sp, sp, a1 -; RV32I-WITHFP-NEXT: .cfi_def_cfa_offset 400032 ; RV32I-WITHFP-NEXT: lui a1, 78 ; RV32I-WITHFP-NEXT: addi a1, a1, 512 ; RV32I-WITHFP-NEXT: lui a2, 1048478 @@ -123,11 +120,10 @@ define void @test_emergency_spill_slot(i32 %a) { ; RV32I-WITHFP-NEXT: lui a0, 97 ; RV32I-WITHFP-NEXT: addi a0, a0, 688 ; RV32I-WITHFP-NEXT: add sp, sp, a0 -; RV32I-WITHFP-NEXT: .cfi_def_cfa_offset 2032 ; RV32I-WITHFP-NEXT: lw s2, 2016(sp) ; RV32I-WITHFP-NEXT: lw s1, 2020(sp) ; RV32I-WITHFP-NEXT: lw s0, 2024(sp) -; RV32I-WITHFP-NEXT: .cfi_def_cfa sp, 400032 +; RV32I-WITHFP-NEXT: .cfi_def_cfa sp, 2032 ; RV32I-WITHFP-NEXT: lw ra, 2028(sp) ; RV32I-WITHFP-NEXT: .cfi_restore ra ; RV32I-WITHFP-NEXT: .cfi_restore s0 |
