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| author | Shiva Chen <shiva0217@gmail.com> | 2018-04-25 14:19:12 +0000 |
|---|---|---|
| committer | Shiva Chen <shiva0217@gmail.com> | 2018-04-25 14:19:12 +0000 |
| commit | d58bd8dc4a1934e87c568a2fa40503461b3c7690 (patch) | |
| tree | 55ff893b43ec60c7b46e86ddf0d2778350dc4437 /llvm/test/CodeGen/RISCV/double-previous-failure.ll | |
| parent | 98f9389f65e630a7243f9c99717009107758d492 (diff) | |
| download | bcm5719-llvm-d58bd8dc4a1934e87c568a2fa40503461b3c7690.tar.gz bcm5719-llvm-d58bd8dc4a1934e87c568a2fa40503461b3c7690.zip | |
[RISCV] Expand function call to "call" pseudoinstruction
To do this:
1. Change GlobalAddress SDNode to TargetGlobalAddress to avoid legalizer
split the symbol.
2. Change ExternalSymbol SDNode to TargetExternalSymbol to avoid legalizer
split the symbol.
3. Let PseudoCALL match direct call with target operand TargetGlobalAddress
and TargetExternalSymbol.
Differential Revision: https://reviews.llvm.org/D44885
llvm-svn: 330827
Diffstat (limited to 'llvm/test/CodeGen/RISCV/double-previous-failure.ll')
| -rw-r--r-- | llvm/test/CodeGen/RISCV/double-previous-failure.ll | 18 |
1 files changed, 6 insertions, 12 deletions
diff --git a/llvm/test/CodeGen/RISCV/double-previous-failure.ll b/llvm/test/CodeGen/RISCV/double-previous-failure.ll index 38840493dc9..3a07e5d5858 100644 --- a/llvm/test/CodeGen/RISCV/double-previous-failure.ll +++ b/llvm/test/CodeGen/RISCV/double-previous-failure.ll @@ -17,21 +17,19 @@ define i32 @main() nounwind { ; RV32IFD: # %bb.0: # %entry ; RV32IFD-NEXT: addi sp, sp, -16 ; RV32IFD-NEXT: sw ra, 12(sp) -; RV32IFD-NEXT: lui a0, %hi(test) -; RV32IFD-NEXT: addi a2, a0, %lo(test) ; RV32IFD-NEXT: lui a0, %hi(.LCPI1_0) ; RV32IFD-NEXT: addi a0, a0, %lo(.LCPI1_0) ; RV32IFD-NEXT: fld ft0, 0(a0) ; RV32IFD-NEXT: fsd ft0, 0(sp) ; RV32IFD-NEXT: lw a0, 0(sp) ; RV32IFD-NEXT: lw a1, 4(sp) -; RV32IFD-NEXT: jalr a2 +; RV32IFD-NEXT: call test +; RV32IFD-NEXT: lui a2, %hi(.LCPI1_1) +; RV32IFD-NEXT: addi a2, a2, %lo(.LCPI1_1) +; RV32IFD-NEXT: fld ft1, 0(a2) ; RV32IFD-NEXT: sw a0, 0(sp) ; RV32IFD-NEXT: sw a1, 4(sp) ; RV32IFD-NEXT: fld ft0, 0(sp) -; RV32IFD-NEXT: lui a0, %hi(.LCPI1_1) -; RV32IFD-NEXT: addi a0, a0, %lo(.LCPI1_1) -; RV32IFD-NEXT: fld ft1, 0(a0) ; RV32IFD-NEXT: flt.d a0, ft0, ft1 ; RV32IFD-NEXT: bnez a0, .LBB1_3 ; RV32IFD-NEXT: # %bb.1: # %entry @@ -42,14 +40,10 @@ define i32 @main() nounwind { ; RV32IFD-NEXT: xori a0, a0, 1 ; RV32IFD-NEXT: beqz a0, .LBB1_3 ; RV32IFD-NEXT: # %bb.2: # %if.end -; RV32IFD-NEXT: lui a0, %hi(exit) -; RV32IFD-NEXT: addi a1, a0, %lo(exit) ; RV32IFD-NEXT: mv a0, zero -; RV32IFD-NEXT: jalr a1 +; RV32IFD-NEXT: call exit ; RV32IFD-NEXT: .LBB1_3: # %if.then -; RV32IFD-NEXT: lui a0, %hi(abort) -; RV32IFD-NEXT: addi a0, a0, %lo(abort) -; RV32IFD-NEXT: jalr a0 +; RV32IFD-NEXT: call abort entry: %call = call double @test(double 2.000000e+00) %cmp = fcmp olt double %call, 2.400000e-01 |
