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| author | Michel Danzer <michel.daenzer@amd.com> | 2013-08-16 16:19:31 +0000 |
|---|---|---|
| committer | Michel Danzer <michel.daenzer@amd.com> | 2013-08-16 16:19:31 +0000 |
| commit | 8522270d7e2cb0c5417de0f58b20761cf9273f3d (patch) | |
| tree | 7050b0cbc042e111800293f453a4b5d714477a7e /llvm/test/CodeGen/R600/xor.ll | |
| parent | 20680b1cc59009fef5f1deee8a42ff6ee053e091 (diff) | |
| download | bcm5719-llvm-8522270d7e2cb0c5417de0f58b20761cf9273f3d.tar.gz bcm5719-llvm-8522270d7e2cb0c5417de0f58b20761cf9273f3d.zip | |
R600/SI: Add pattern for xor of i1
Fixes two recent piglit regressions with radeonsi.
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
llvm-svn: 188559
Diffstat (limited to 'llvm/test/CodeGen/R600/xor.ll')
| -rw-r--r-- | llvm/test/CodeGen/R600/xor.ll | 17 |
1 files changed, 17 insertions, 0 deletions
diff --git a/llvm/test/CodeGen/R600/xor.ll b/llvm/test/CodeGen/R600/xor.ll index f52729d4ae0..84d4cd49e93 100644 --- a/llvm/test/CodeGen/R600/xor.ll +++ b/llvm/test/CodeGen/R600/xor.ll @@ -37,3 +37,20 @@ define void @xor_v4i32(<4 x i32> addrspace(1)* %out, <4 x i32> addrspace(1)* %in store <4 x i32> %result, <4 x i32> addrspace(1)* %out ret void } + +;EG-CHECK: @xor_i1 +;EG-CHECK: XOR_INT {{\*? *}}T{{[0-9]+\.[XYZW], PV\.[XYZW], PV\.[XYZW]}} + +;SI-CHECK: @xor_i1 +;SI-CHECK: S_XOR_B64 {{SGPR[0-9]+_SGPR[0-9]+, SGPR[0-9]+_SGPR[0-9]+, SGPR[0-9]+_SGPR[0-9]+}} + +define void @xor_i1(float addrspace(1)* %out, float addrspace(1)* %in0, float addrspace(1)* %in1) { + %a = load float addrspace(1) * %in0 + %b = load float addrspace(1) * %in1 + %acmp = fcmp oge float %a, 0.000000e+00 + %bcmp = fcmp oge float %b, 0.000000e+00 + %xor = xor i1 %acmp, %bcmp + %result = select i1 %xor, float %a, float %b + store float %result, float addrspace(1)* %out + ret void +} |
