R600: Call EmitFunctionHeader() in the AsmPrinter to populate the ELF symbol table

llvm-svn: 218776

1 files changed, 15 insertions, 15 deletions

diff --git a/llvm/test/CodeGen/R600/xor.ll b/llvm/test/CodeGen/R600/xor.ll
index 8c2c80ed195..00e57f68ec7 100644
--- a/llvm/test/CodeGen/R600/xor.ll
+++ b/llvm/test/CodeGen/R600/xor.ll
@@ -1,11 +1,11 @@
 ;RUN: llc < %s -march=r600 -mcpu=redwood | FileCheck --check-prefix=EG-CHECK %s
 ;RUN: llc < %s -march=r600 -mcpu=verde -verify-machineinstrs | FileCheck --check-prefix=SI-CHECK %s
 
-;EG-CHECK: @xor_v2i32
+;EG-CHECK: {{^}}xor_v2i32:
 ;EG-CHECK: XOR_INT {{\** *}}T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
 ;EG-CHECK: XOR_INT {{\** *}}T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
 
-;SI-CHECK: @xor_v2i32
+;SI-CHECK: {{^}}xor_v2i32:
 ;SI-CHECK: V_XOR_B32_e32 v{{[0-9]+, v[0-9]+, v[0-9]+}}
 ;SI-CHECK: V_XOR_B32_e32 v{{[0-9]+, v[0-9]+, v[0-9]+}}
 
@@ -18,13 +18,13 @@ define void @xor_v2i32(<2 x i32> addrspace(1)* %out, <2 x i32> addrspace(1)* %in
   ret void
 }
 
-;EG-CHECK: @xor_v4i32
+;EG-CHECK: {{^}}xor_v4i32:
 ;EG-CHECK: XOR_INT {{\** *}}T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
 ;EG-CHECK: XOR_INT {{\** *}}T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
 ;EG-CHECK: XOR_INT {{\** *}}T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
 ;EG-CHECK: XOR_INT {{\** *}}T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
 
-;SI-CHECK: @xor_v4i32
+;SI-CHECK: {{^}}xor_v4i32:
 ;SI-CHECK: V_XOR_B32_e32 {{v[0-9]+, v[0-9]+, v[0-9]+}}
 ;SI-CHECK: V_XOR_B32_e32 {{v[0-9]+, v[0-9]+, v[0-9]+}}
 ;SI-CHECK: V_XOR_B32_e32 {{v[0-9]+, v[0-9]+, v[0-9]+}}
@@ -38,10 +38,10 @@ define void @xor_v4i32(<4 x i32> addrspace(1)* %out, <4 x i32> addrspace(1)* %in
   ret void
 }
 
-;EG-CHECK: @xor_i1
+;EG-CHECK: {{^}}xor_i1:
 ;EG-CHECK: XOR_INT {{\** *}}T{{[0-9]+\.[XYZW], PV\.[XYZW], PS}}
 
-;SI-CHECK: @xor_i1
+;SI-CHECK: {{^}}xor_i1:
 ;SI-CHECK: V_XOR_B32_e32 v{{[0-9]+}}, v{{[0-9]+}}, v{{[0-9]+}}
 
 define void @xor_i1(float addrspace(1)* %out, float addrspace(1)* %in0, float addrspace(1)* %in1) {
@@ -55,7 +55,7 @@ define void @xor_i1(float addrspace(1)* %out, float addrspace(1)* %in0, float ad
   ret void
 }
 
-; SI-CHECK-LABEL: @vector_xor_i32
+; SI-CHECK-LABEL: {{^}}vector_xor_i32:
 ; SI-CHECK: V_XOR_B32_e32
 define void @vector_xor_i32(i32 addrspace(1)* %out, i32 addrspace(1)* %in0, i32 addrspace(1)* %in1) {
   %a = load i32 addrspace(1)* %in0
@@ -65,7 +65,7 @@ define void @vector_xor_i32(i32 addrspace(1)* %out, i32 addrspace(1)* %in0, i32
   ret void
 }
 
-; SI-CHECK-LABEL: @scalar_xor_i32
+; SI-CHECK-LABEL: {{^}}scalar_xor_i32:
 ; SI-CHECK: S_XOR_B32
 define void @scalar_xor_i32(i32 addrspace(1)* %out, i32 %a, i32 %b) {
   %result = xor i32 %a, %b
@@ -73,7 +73,7 @@ define void @scalar_xor_i32(i32 addrspace(1)* %out, i32 %a, i32 %b) {
   ret void
 }
 
-; SI-CHECK-LABEL: @scalar_not_i32
+; SI-CHECK-LABEL: {{^}}scalar_not_i32:
 ; SI-CHECK: S_NOT_B32
 define void @scalar_not_i32(i32 addrspace(1)* %out, i32 %a) {
   %result = xor i32 %a, -1
@@ -81,7 +81,7 @@ define void @scalar_not_i32(i32 addrspace(1)* %out, i32 %a) {
   ret void
 }
 
-; SI-CHECK-LABEL: @vector_not_i32
+; SI-CHECK-LABEL: {{^}}vector_not_i32:
 ; SI-CHECK: V_NOT_B32
 define void @vector_not_i32(i32 addrspace(1)* %out, i32 addrspace(1)* %in0, i32 addrspace(1)* %in1) {
   %a = load i32 addrspace(1)* %in0
@@ -91,7 +91,7 @@ define void @vector_not_i32(i32 addrspace(1)* %out, i32 addrspace(1)* %in0, i32
   ret void
 }
 
-; SI-CHECK-LABEL: @vector_xor_i64
+; SI-CHECK-LABEL: {{^}}vector_xor_i64:
 ; SI-CHECK: V_XOR_B32_e32
 ; SI-CHECK: V_XOR_B32_e32
 ; SI-CHECK: S_ENDPGM
@@ -103,7 +103,7 @@ define void @vector_xor_i64(i64 addrspace(1)* %out, i64 addrspace(1)* %in0, i64
   ret void
 }
 
-; SI-CHECK-LABEL: @scalar_xor_i64
+; SI-CHECK-LABEL: {{^}}scalar_xor_i64:
 ; SI-CHECK: S_XOR_B64
 ; SI-CHECK: S_ENDPGM
 define void @scalar_xor_i64(i64 addrspace(1)* %out, i64 %a, i64 %b) {
@@ -112,7 +112,7 @@ define void @scalar_xor_i64(i64 addrspace(1)* %out, i64 %a, i64 %b) {
   ret void
 }
 
-; SI-CHECK-LABEL: @scalar_not_i64
+; SI-CHECK-LABEL: {{^}}scalar_not_i64:
 ; SI-CHECK: S_NOT_B64
 define void @scalar_not_i64(i64 addrspace(1)* %out, i64 %a) {
   %result = xor i64 %a, -1
@@ -120,7 +120,7 @@ define void @scalar_not_i64(i64 addrspace(1)* %out, i64 %a) {
   ret void
 }
 
-; SI-CHECK-LABEL: @vector_not_i64
+; SI-CHECK-LABEL: {{^}}vector_not_i64:
 ; SI-CHECK: V_NOT_B32
 ; SI-CHECK: V_NOT_B32
 define void @vector_not_i64(i64 addrspace(1)* %out, i64 addrspace(1)* %in0, i64 addrspace(1)* %in1) {
@@ -135,7 +135,7 @@ define void @vector_not_i64(i64 addrspace(1)* %out, i64 addrspace(1)* %in0, i64
 ; Note that in the future the backend may be smart enough to
 ; use an SALU instruction for this.
 
-; SI-CHECK-LABEL: @xor_cf
+; SI-CHECK-LABEL: {{^}}xor_cf:
 ; SI-CHECK: S_XOR_B64
 define void @xor_cf(i64 addrspace(1)* %out, i64 addrspace(1)* %in, i64 %a, i64 %b) {
 entry: