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| author | Tom Stellard <thomas.stellard@amd.com> | 2015-01-12 19:33:18 +0000 |
|---|---|---|
| committer | Tom Stellard <thomas.stellard@amd.com> | 2015-01-12 19:33:18 +0000 |
| commit | b6550529a62a1f47c966f33687a10b2a4dc6885a (patch) | |
| tree | ee5aef6aa74e5a18a4bd642037222a716f0c3da8 /llvm/test/CodeGen/R600/sub.ll | |
| parent | 89b26108b12bf608601049e3b6285192fda2ea47 (diff) | |
| download | bcm5719-llvm-b6550529a62a1f47c966f33687a10b2a4dc6885a.tar.gz bcm5719-llvm-b6550529a62a1f47c966f33687a10b2a4dc6885a.zip | |
R600/SI: Use RegisterOperands to specify which operands can accept immediates
There are some operands which can take either immediates or registers
and we were previously using different register class to distinguish
between operands that could take immediates and those that could not.
This patch switches to using RegisterOperands which should simplify the
backend by reducing the number of register classes and also make it
easier to implement the assembler.
llvm-svn: 225662
Diffstat (limited to 'llvm/test/CodeGen/R600/sub.ll')
| -rw-r--r-- | llvm/test/CodeGen/R600/sub.ll | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/llvm/test/CodeGen/R600/sub.ll b/llvm/test/CodeGen/R600/sub.ll index d8b55da5cf5..be48e186e87 100644 --- a/llvm/test/CodeGen/R600/sub.ll +++ b/llvm/test/CodeGen/R600/sub.ll @@ -7,7 +7,7 @@ declare i32 @llvm.r600.read.tidig.x() readnone ; FUNC-LABEL: {{^}}test_sub_i32: ; EG: SUB_INT {{\** *}}T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}} -; SI: v_sub_i32_e32 v{{[0-9]+, v[0-9]+, v[0-9]+}} +; SI: v_subrev_i32_e32 v{{[0-9]+, v[0-9]+, v[0-9]+}} define void @test_sub_i32(i32 addrspace(1)* %out, i32 addrspace(1)* %in) { %b_ptr = getelementptr i32 addrspace(1)* %in, i32 1 %a = load i32 addrspace(1)* %in |
