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| author | Tom Stellard <thomas.stellard@amd.com> | 2013-10-29 16:37:20 +0000 |
|---|---|---|
| committer | Tom Stellard <thomas.stellard@amd.com> | 2013-10-29 16:37:20 +0000 |
| commit | e118b8becdf68135fd7abd34402d910a0fff7a5c (patch) | |
| tree | 9bbe2c2a6339569d950840748cc4f6b0e26d695d /llvm/test/CodeGen/R600/llvm.sqrt.ll | |
| parent | cbd806aef8f722195220326f7866500fd3c0b180 (diff) | |
| download | bcm5719-llvm-e118b8becdf68135fd7abd34402d910a0fff7a5c.tar.gz bcm5719-llvm-e118b8becdf68135fd7abd34402d910a0fff7a5c.zip | |
R600: Expand vector FSQRT ops
llvm-svn: 193620
Diffstat (limited to 'llvm/test/CodeGen/R600/llvm.sqrt.ll')
| -rw-r--r-- | llvm/test/CodeGen/R600/llvm.sqrt.ll | 54 |
1 files changed, 54 insertions, 0 deletions
diff --git a/llvm/test/CodeGen/R600/llvm.sqrt.ll b/llvm/test/CodeGen/R600/llvm.sqrt.ll new file mode 100644 index 00000000000..0d0d1861899 --- /dev/null +++ b/llvm/test/CodeGen/R600/llvm.sqrt.ll @@ -0,0 +1,54 @@ +; RUN: llc < %s -march=r600 --mcpu=redwood | FileCheck %s --check-prefix=R600-CHECK +; RUN: llc < %s -march=r600 --mcpu=SI | FileCheck %s --check-prefix=SI-CHECK + +; R600-CHECK-LABEL: @sqrt_f32 +; R600-CHECK: RECIPSQRT_CLAMPED * T{{[0-9]\.[XYZW]}}, KC0[2].Z +; R600-CHECK: MUL NON-IEEE T{{[0-9]\.[XYZW]}}, KC0[2].Z, PS +; SI-CHECK-LABEL: @sqrt_f32 +; SI-CHECK: V_SQRT_F32_e32 +define void @sqrt_f32(float addrspace(1)* %out, float %in) { +entry: + %0 = call float @llvm.sqrt.f32(float %in) + store float %0, float addrspace(1)* %out + ret void +} + +; R600-CHECK-LABEL: @sqrt_v2f32 +; R600-CHECK-DAG: RECIPSQRT_CLAMPED * T{{[0-9]\.[XYZW]}}, KC0[2].W +; R600-CHECK-DAG: MUL NON-IEEE T{{[0-9]\.[XYZW]}}, KC0[2].W, PS +; R600-CHECK-DAG: RECIPSQRT_CLAMPED * T{{[0-9]\.[XYZW]}}, KC0[3].X +; R600-CHECK-DAG: MUL NON-IEEE T{{[0-9]\.[XYZW]}}, KC0[3].X, PS +; SI-CHECK-LABEL: @sqrt_v2f32 +; SI-CHECK: V_SQRT_F32_e32 +; SI-CHECK: V_SQRT_F32_e32 +define void @sqrt_v2f32(<2 x float> addrspace(1)* %out, <2 x float> %in) { +entry: + %0 = call <2 x float> @llvm.sqrt.v2f32(<2 x float> %in) + store <2 x float> %0, <2 x float> addrspace(1)* %out + ret void +} + +; R600-CHECK-LABEL: @sqrt_v4f32 +; R600-CHECK-DAG: RECIPSQRT_CLAMPED * T{{[0-9]\.[XYZW]}}, KC0[3].Y +; R600-CHECK-DAG: MUL NON-IEEE T{{[0-9]\.[XYZW]}}, KC0[3].Y, PS +; R600-CHECK-DAG: RECIPSQRT_CLAMPED * T{{[0-9]\.[XYZW]}}, KC0[3].Z +; R600-CHECK-DAG: MUL NON-IEEE T{{[0-9]\.[XYZW]}}, KC0[3].Z, PS +; R600-CHECK-DAG: RECIPSQRT_CLAMPED * T{{[0-9]\.[XYZW]}}, KC0[3].W +; R600-CHECK-DAG: MUL NON-IEEE T{{[0-9]\.[XYZW]}}, KC0[3].W, PS +; R600-CHECK-DAG: RECIPSQRT_CLAMPED * T{{[0-9]\.[XYZW]}}, KC0[4].X +; R600-CHECK-DAG: MUL NON-IEEE T{{[0-9]\.[XYZW]}}, KC0[4].X, PS +; SI-CHECK-LABEL: @sqrt_v4f32 +; SI-CHECK: V_SQRT_F32_e32 +; SI-CHECK: V_SQRT_F32_e32 +; SI-CHECK: V_SQRT_F32_e32 +; SI-CHECK: V_SQRT_F32_e32 +define void @sqrt_v4f32(<4 x float> addrspace(1)* %out, <4 x float> %in) { +entry: + %0 = call <4 x float> @llvm.sqrt.v4f32(<4 x float> %in) + store <4 x float> %0, <4 x float> addrspace(1)* %out + ret void +} + +declare float @llvm.sqrt.f32(float %in) +declare <2 x float> @llvm.sqrt.v2f32(<2 x float> %in) +declare <4 x float> @llvm.sqrt.v4f32(<4 x float> %in) |
