R600/SI: Change all instruction assembly names to lowercase.

This matches the format produced by the AMD proprietary driver.

//==================================================================//
// Shell script for converting .ll test cases: (Pass the .ll files
   you want to convert to this script as arguments).
//==================================================================//

; This was necessary on my system so that A-Z in sed would match only
; upper case.  I'm not sure why.
export LC_ALL='C'

TEST_FILES="$*"

MATCHES=`grep -v Patterns SIInstructions.td | grep -o '"[A-Z0-9_]\+["e]' | grep -o '[A-Z0-9_]\+' | sort -r`

for f in $TEST_FILES; do
  # Check that there are SI tests:
  grep -q -e 'verde' -e 'bonaire' -e 'SI' -e 'tahiti' $f
  if [ $? -eq 0 ]; then
    for match in $MATCHES; do
      sed -i -e "s/\([ :]$match\)/\L\1/" $f
    done

    # Try to get check lines with partial instruction names
    sed -i 's/\(;[ ]*SI[A-Z\\-]*: \)\([A-Z_0-9]\+\)/\1\L\2/' $f
  fi
done

sed -i -e 's/bb0_1/BB0_1/g' ../../../test/CodeGen/R600/infinite-loop.ll
sed -i -e 's/SI-NOT: bfe/SI-NOT: {{[^@]}}bfe/g'../../../test/CodeGen/R600/llvm.AMDGPU.bfe.*32.ll ../../../test/CodeGen/R600/sext-in-reg.ll
sed -i -e 's/exp_IEEE/EXP_IEEE/g' ../../../test/CodeGen/R600/llvm.exp2.ll
sed -i -e 's/numVgprs/NumVgprs/g' ../../../test/CodeGen/R600/register-count-comments.ll
sed -i 's/\(; CHECK[-NOT]*: \)\([A-Z_0-9]\+\)/\1\L\2/' ../../../test/CodeGen/R600/select64.ll ../../../test/CodeGen/R600/sgpr-copy.ll

//==================================================================//
// Shell script for converting .td files (run this last)
//==================================================================//

export LC_ALL='C'
sed -i -e '/Patterns/!s/\("[A-Z0-9_]\+[ "e]\)/\L\1/g' SIInstructions.td
sed -i -e 's/"EXP/"exp/g' SIInstrInfo.td

llvm-svn: 221350

1 files changed, 29 insertions, 29 deletions

diff --git a/llvm/test/CodeGen/R600/llvm.sin.ll b/llvm/test/CodeGen/R600/llvm.sin.ll
index a365ecb0ccb..7e45710842f 100644
--- a/llvm/test/CodeGen/R600/llvm.sin.ll
+++ b/llvm/test/CodeGen/R600/llvm.sin.ll
@@ -8,10 +8,10 @@
 ; EG: ADD *
 ; EG: SIN * T{{[0-9]+\.[XYZW], PV\.[XYZW]}}
 ; EG-NOT: SIN
-; SI: V_MUL_F32
-; SI: V_FRACT_F32
-; SI: V_SIN_F32
-; SI-NOT: V_SIN_F32
+; SI: v_mul_f32
+; SI: v_fract_f32
+; SI: v_sin_f32
+; SI-NOT: v_sin_f32
 
 define void @sin_f32(float addrspace(1)* %out, float %x) #1 {
    %sin = call float @llvm.sin.f32(float %x)
@@ -20,14 +20,14 @@ define void @sin_f32(float addrspace(1)* %out, float %x) #1 {
 }
 
 ; FUNC-LABEL: {{^}}sin_3x_f32:
-; SI-UNSAFE-NOT: V_ADD_F32
+; SI-UNSAFE-NOT: v_add_f32
 ; SI-UNSAFE: 0x3ef47644
-; SI-UNSAFE: V_MUL_F32
-; SI-SAFE: V_MUL_F32
-; SI-SAFE: V_MUL_F32
-; SI: V_FRACT_F32
-; SI: V_SIN_F32
-; SI-NOT: V_SIN_F32
+; SI-UNSAFE: v_mul_f32
+; SI-SAFE: v_mul_f32
+; SI-SAFE: v_mul_f32
+; SI: v_fract_f32
+; SI: v_sin_f32
+; SI-NOT: v_sin_f32
 define void @sin_3x_f32(float addrspace(1)* %out, float %x) #1 {
   %y = fmul float 3.0, %x
   %sin = call float @llvm.sin.f32(float %y)
@@ -36,14 +36,14 @@ define void @sin_3x_f32(float addrspace(1)* %out, float %x) #1 {
 }
 
 ; FUNC-LABEL: {{^}}sin_2x_f32:
-; SI-UNSAFE-NOT: V_ADD_F32
+; SI-UNSAFE-NOT: v_add_f32
 ; SI-UNSAFE: 0x3ea2f983
-; SI-UNSAFE: V_MUL_F32
-; SI-SAFE: V_ADD_F32
-; SI-SAFE: V_MUL_F32
-; SI: V_FRACT_F32
-; SI: V_SIN_F32
-; SI-NOT: V_SIN_F32
+; SI-UNSAFE: v_mul_f32
+; SI-SAFE: v_add_f32
+; SI-SAFE: v_mul_f32
+; SI: v_fract_f32
+; SI: v_sin_f32
+; SI-NOT: v_sin_f32
 define void @sin_2x_f32(float addrspace(1)* %out, float %x) #1 {
   %y = fmul float 2.0, %x
   %sin = call float @llvm.sin.f32(float %y)
@@ -53,12 +53,12 @@ define void @sin_2x_f32(float addrspace(1)* %out, float %x) #1 {
 
 ; FUNC-LABEL: {{^}}test_2sin_f32:
 ; SI-UNSAFE: 0x3ea2f983
-; SI-UNSAFE: V_MUL_F32
-; SI-SAFE: V_ADD_F32
-; SI-SAFE: V_MUL_F32
-; SI: V_FRACT_F32
-; SI: V_SIN_F32
-; SI-NOT: V_SIN_F32
+; SI-UNSAFE: v_mul_f32
+; SI-SAFE: v_add_f32
+; SI-SAFE: v_mul_f32
+; SI: v_fract_f32
+; SI: v_sin_f32
+; SI-NOT: v_sin_f32
 define void @test_2sin_f32(float addrspace(1)* %out, float %x) #1 {
    %y = fmul float 2.0, %x
    %sin = call float @llvm.sin.f32(float %y)
@@ -72,11 +72,11 @@ define void @test_2sin_f32(float addrspace(1)* %out, float %x) #1 {
 ; EG: SIN * T{{[0-9]+\.[XYZW], PV\.[XYZW]}}
 ; EG: SIN * T{{[0-9]+\.[XYZW], PV\.[XYZW]}}
 ; EG-NOT: SIN
-; SI: V_SIN_F32
-; SI: V_SIN_F32
-; SI: V_SIN_F32
-; SI: V_SIN_F32
-; SI-NOT: V_SIN_F32
+; SI: v_sin_f32
+; SI: v_sin_f32
+; SI: v_sin_f32
+; SI: v_sin_f32
+; SI-NOT: v_sin_f32
 
 define void @sin_v4f32(<4 x float> addrspace(1)* %out, <4 x float> %vx) #1 {
    %sin = call <4 x float> @llvm.sin.v4f32( <4 x float> %vx)