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| author | David Blaikie <dblaikie@gmail.com> | 2015-02-27 21:17:42 +0000 |
|---|---|---|
| committer | David Blaikie <dblaikie@gmail.com> | 2015-02-27 21:17:42 +0000 |
| commit | a79ac14fa68297f9888bc70a10df5ed9b8864e38 (patch) | |
| tree | 8d8217a8928e3ee599bdde405e2e178b3a55b645 /llvm/test/CodeGen/R600/llvm.AMDGPU.umax.ll | |
| parent | 83687fb9e654c9d0086e7f6b728c26fa0b729e71 (diff) | |
| download | bcm5719-llvm-a79ac14fa68297f9888bc70a10df5ed9b8864e38.tar.gz bcm5719-llvm-a79ac14fa68297f9888bc70a10df5ed9b8864e38.zip | |
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
Essentially the same as the GEP change in r230786.
A similar migration script can be used to update test cases, though a few more
test case improvements/changes were required this time around: (r229269-r229278)
import fileinput
import sys
import re
pat = re.compile(r"((?:=|:|^)\s*load (?:atomic )?(?:volatile )?(.*?))(| addrspace\(\d+\) *)\*($| *(?:%|@|null|undef|blockaddress|getelementptr|addrspacecast|bitcast|inttoptr|\[\[[a-zA-Z]|\{\{).*$)")
for line in sys.stdin:
sys.stdout.write(re.sub(pat, r"\1, \2\3*\4", line))
Reviewers: rafael, dexonsmith, grosser
Differential Revision: http://reviews.llvm.org/D7649
llvm-svn: 230794
Diffstat (limited to 'llvm/test/CodeGen/R600/llvm.AMDGPU.umax.ll')
| -rw-r--r-- | llvm/test/CodeGen/R600/llvm.AMDGPU.umax.ll | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/llvm/test/CodeGen/R600/llvm.AMDGPU.umax.ll b/llvm/test/CodeGen/R600/llvm.AMDGPU.umax.ll index 4320dfe669d..a97d103016d 100644 --- a/llvm/test/CodeGen/R600/llvm.AMDGPU.umax.ll +++ b/llvm/test/CodeGen/R600/llvm.AMDGPU.umax.ll @@ -5,7 +5,7 @@ ; SI: v_max_u32_e32 define void @vector_umax(i32 %p0, i32 %p1, i32 addrspace(1)* %in) #0 { main_body: - %load = load i32 addrspace(1)* %in, align 4 + %load = load i32, i32 addrspace(1)* %in, align 4 %max = call i32 @llvm.AMDGPU.umax(i32 %p0, i32 %load) %bc = bitcast i32 %max to float call void @llvm.SI.export(i32 15, i32 1, i32 1, i32 0, i32 0, float %bc, float %bc, float %bc, float %bc) @@ -28,7 +28,7 @@ entry: ; SI-NOT: and ; SI: buffer_store_short [[RESULT]], define void @trunc_zext_umax(i16 addrspace(1)* nocapture %out, i8 addrspace(1)* nocapture %src) nounwind { - %tmp5 = load i8 addrspace(1)* %src, align 1 + %tmp5 = load i8, i8 addrspace(1)* %src, align 1 %tmp2 = zext i8 %tmp5 to i32 %tmp3 = tail call i32 @llvm.AMDGPU.umax(i32 %tmp2, i32 0) nounwind readnone %tmp4 = trunc i32 %tmp3 to i8 |
