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| author | Tom Stellard <thomas.stellard@amd.com> | 2013-07-12 18:15:08 +0000 |
|---|---|---|
| committer | Tom Stellard <thomas.stellard@amd.com> | 2013-07-12 18:15:08 +0000 |
| commit | 2a6a610516690c1e9f0de500d81cc751b35ce3ee (patch) | |
| tree | d9f88584ddf7f81422cf0b84ef8f7bce62bbd5da /llvm/test/CodeGen/R600/fsub64.ll | |
| parent | ab8a8c84d4a1026abcd80e87c41726b8347a961e (diff) | |
| download | bcm5719-llvm-2a6a610516690c1e9f0de500d81cc751b35ce3ee.tar.gz bcm5719-llvm-2a6a610516690c1e9f0de500d81cc751b35ce3ee.zip | |
R600/SI: Add double precision fsub pattern for SI
Patch by: Niels Ole Salscheider
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
llvm-svn: 186179
Diffstat (limited to 'llvm/test/CodeGen/R600/fsub64.ll')
| -rw-r--r-- | llvm/test/CodeGen/R600/fsub64.ll | 13 |
1 files changed, 13 insertions, 0 deletions
diff --git a/llvm/test/CodeGen/R600/fsub64.ll b/llvm/test/CodeGen/R600/fsub64.ll new file mode 100644 index 00000000000..fa59dcc394b --- /dev/null +++ b/llvm/test/CodeGen/R600/fsub64.ll @@ -0,0 +1,13 @@ +; RUN: llc < %s -march=r600 -mcpu=tahiti | FileCheck %s + +; CHECK: @fsub_f64 +; CHECK: V_ADD_F64 {{VGPR[0-9]+_VGPR[0-9]+, VGPR[0-9]+_VGPR[0-9]+, VGPR[0-9]+_VGPR[0-9]+}}, 0, 0, 0, 0, 2 + +define void @fsub_f64(double addrspace(1)* %out, double addrspace(1)* %in1, + double addrspace(1)* %in2) { + %r0 = load double addrspace(1)* %in1 + %r1 = load double addrspace(1)* %in2 + %r2 = fsub double %r0, %r1 + store double %r2, double addrspace(1)* %out + ret void +} |
