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author | Tom Stellard <thomas.stellard@amd.com> | 2014-10-01 17:15:17 +0000 |
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committer | Tom Stellard <thomas.stellard@amd.com> | 2014-10-01 17:15:17 +0000 |
commit | 79243d9664671d43eb2d688b3b1b30bf9a5a19b7 (patch) | |
tree | ce9b59b6bfc7ab0c68963918fa5f07cc838f99f4 /llvm/test/CodeGen/R600/fmuladd.ll | |
parent | 0a4e9a3b25ceac87bede40e6b4f7cae01468a507 (diff) | |
download | bcm5719-llvm-79243d9664671d43eb2d688b3b1b30bf9a5a19b7.tar.gz bcm5719-llvm-79243d9664671d43eb2d688b3b1b30bf9a5a19b7.zip |
R600: Call EmitFunctionHeader() in the AsmPrinter to populate the ELF symbol table
llvm-svn: 218776
Diffstat (limited to 'llvm/test/CodeGen/R600/fmuladd.ll')
-rw-r--r-- | llvm/test/CodeGen/R600/fmuladd.ll | 20 |
1 files changed, 10 insertions, 10 deletions
diff --git a/llvm/test/CodeGen/R600/fmuladd.ll b/llvm/test/CodeGen/R600/fmuladd.ll index ea559c3ddc6..c2360e6ec98 100644 --- a/llvm/test/CodeGen/R600/fmuladd.ll +++ b/llvm/test/CodeGen/R600/fmuladd.ll @@ -5,7 +5,7 @@ declare double @llvm.fmuladd.f64(double, double, double) declare i32 @llvm.r600.read.tidig.x() nounwind readnone declare float @llvm.fabs.f32(float) nounwind readnone -; CHECK-LABEL: @fmuladd_f32 +; CHECK-LABEL: {{^}}fmuladd_f32: ; CHECK: V_MAD_F32 {{v[0-9]+, v[0-9]+, v[0-9]+, v[0-9]+}} define void @fmuladd_f32(float addrspace(1)* %out, float addrspace(1)* %in1, @@ -18,7 +18,7 @@ define void @fmuladd_f32(float addrspace(1)* %out, float addrspace(1)* %in1, ret void } -; CHECK-LABEL: @fmuladd_f64 +; CHECK-LABEL: {{^}}fmuladd_f64: ; CHECK: V_FMA_F64 {{v\[[0-9]+:[0-9]+\], v\[[0-9]+:[0-9]+\], v\[[0-9]+:[0-9]+\], v\[[0-9]+:[0-9]+\]}} define void @fmuladd_f64(double addrspace(1)* %out, double addrspace(1)* %in1, @@ -31,7 +31,7 @@ define void @fmuladd_f64(double addrspace(1)* %out, double addrspace(1)* %in1, ret void } -; CHECK-LABEL: @fmuladd_2.0_a_b_f32 +; CHECK-LABEL: {{^}}fmuladd_2.0_a_b_f32 ; CHECK-DAG: BUFFER_LOAD_DWORD [[R1:v[0-9]+]], {{v\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}, 0 addr64{{$}} ; CHECK-DAG: BUFFER_LOAD_DWORD [[R2:v[0-9]+]], {{v\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}, 0 addr64 offset:0x4 ; CHECK: V_MAD_F32 [[RESULT:v[0-9]+]], 2.0, [[R1]], [[R2]] @@ -50,7 +50,7 @@ define void @fmuladd_2.0_a_b_f32(float addrspace(1)* %out, float addrspace(1)* % ret void } -; CHECK-LABEL: @fmuladd_a_2.0_b_f32 +; CHECK-LABEL: {{^}}fmuladd_a_2.0_b_f32 ; CHECK-DAG: BUFFER_LOAD_DWORD [[R1:v[0-9]+]], {{v\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}, 0 addr64{{$}} ; CHECK-DAG: BUFFER_LOAD_DWORD [[R2:v[0-9]+]], {{v\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}, 0 addr64 offset:0x4 ; CHECK: V_MAD_F32 [[RESULT:v[0-9]+]], 2.0, [[R1]], [[R2]] @@ -69,7 +69,7 @@ define void @fmuladd_a_2.0_b_f32(float addrspace(1)* %out, float addrspace(1)* % ret void } -; CHECK-LABEL: @fadd_a_a_b_f32 +; CHECK-LABEL: {{^}}fadd_a_a_b_f32: ; CHECK-DAG: BUFFER_LOAD_DWORD [[R1:v[0-9]+]], {{v\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}, 0 addr64{{$}} ; CHECK-DAG: BUFFER_LOAD_DWORD [[R2:v[0-9]+]], {{v\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}, 0 addr64 offset:0x4 ; CHECK: V_MAD_F32 [[RESULT:v[0-9]+]], 2.0, [[R1]], [[R2]] @@ -91,7 +91,7 @@ define void @fadd_a_a_b_f32(float addrspace(1)* %out, ret void } -; CHECK-LABEL: @fadd_b_a_a_f32 +; CHECK-LABEL: {{^}}fadd_b_a_a_f32: ; CHECK-DAG: BUFFER_LOAD_DWORD [[R1:v[0-9]+]], {{v\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}, 0 addr64{{$}} ; CHECK-DAG: BUFFER_LOAD_DWORD [[R2:v[0-9]+]], {{v\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}, 0 addr64 offset:0x4 ; CHECK: V_MAD_F32 [[RESULT:v[0-9]+]], 2.0, [[R1]], [[R2]] @@ -113,7 +113,7 @@ define void @fadd_b_a_a_f32(float addrspace(1)* %out, ret void } -; CHECK-LABEL: @fmuladd_neg_2.0_a_b_f32 +; CHECK-LABEL: {{^}}fmuladd_neg_2.0_a_b_f32 ; CHECK-DAG: BUFFER_LOAD_DWORD [[R1:v[0-9]+]], {{v\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}, 0 addr64{{$}} ; CHECK-DAG: BUFFER_LOAD_DWORD [[R2:v[0-9]+]], {{v\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}, 0 addr64 offset:0x4 ; CHECK: V_MAD_F32 [[RESULT:v[0-9]+]], [[R1]], -2.0, [[R2]] @@ -133,7 +133,7 @@ define void @fmuladd_neg_2.0_a_b_f32(float addrspace(1)* %out, float addrspace(1 } -; CHECK-LABEL: @fmuladd_neg_2.0_neg_a_b_f32 +; CHECK-LABEL: {{^}}fmuladd_neg_2.0_neg_a_b_f32 ; CHECK-DAG: BUFFER_LOAD_DWORD [[R1:v[0-9]+]], {{v\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}, 0 addr64{{$}} ; CHECK-DAG: BUFFER_LOAD_DWORD [[R2:v[0-9]+]], {{v\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}, 0 addr64 offset:0x4 ; CHECK: V_MAD_F32 [[RESULT:v[0-9]+]], 2.0, [[R1]], [[R2]] @@ -155,7 +155,7 @@ define void @fmuladd_neg_2.0_neg_a_b_f32(float addrspace(1)* %out, float addrspa } -; CHECK-LABEL: @fmuladd_2.0_neg_a_b_f32 +; CHECK-LABEL: {{^}}fmuladd_2.0_neg_a_b_f32 ; CHECK-DAG: BUFFER_LOAD_DWORD [[R1:v[0-9]+]], {{v\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}, 0 addr64{{$}} ; CHECK-DAG: BUFFER_LOAD_DWORD [[R2:v[0-9]+]], {{v\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}, 0 addr64 offset:0x4 ; CHECK: V_MAD_F32 [[RESULT:v[0-9]+]], [[R1]], -2.0, [[R2]] @@ -177,7 +177,7 @@ define void @fmuladd_2.0_neg_a_b_f32(float addrspace(1)* %out, float addrspace(1 } -; CHECK-LABEL: @fmuladd_2.0_a_neg_b_f32 +; CHECK-LABEL: {{^}}fmuladd_2.0_a_neg_b_f32 ; CHECK-DAG: BUFFER_LOAD_DWORD [[R1:v[0-9]+]], {{v\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}, 0 addr64{{$}} ; CHECK-DAG: BUFFER_LOAD_DWORD [[R2:v[0-9]+]], {{v\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}, 0 addr64 offset:0x4 ; CHECK: V_MAD_F32 [[RESULT:v[0-9]+]], 2.0, [[R1]], -[[R2]] |