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| author | Matt Arsenault <Matthew.Arsenault@amd.com> | 2014-12-03 03:12:13 +0000 |
|---|---|---|
| committer | Matt Arsenault <Matthew.Arsenault@amd.com> | 2014-12-03 03:12:13 +0000 |
| commit | fb13b22d9a28f4ed3e048e4cc38c2099466d5ca2 (patch) | |
| tree | 626d6073ef6195a2d5ad30c70b254c7ec3a9c5b4 /llvm/test/CodeGen/R600/fmin_legacy.ll | |
| parent | 2e8a6219fc0159a6e95845e401ea67b720dc2ece (diff) | |
| download | bcm5719-llvm-fb13b22d9a28f4ed3e048e4cc38c2099466d5ca2.tar.gz bcm5719-llvm-fb13b22d9a28f4ed3e048e4cc38c2099466d5ca2.zip | |
R600/SI: Change mubuf offsets to print as decimal
This matches SC's behavior.
llvm-svn: 223194
Diffstat (limited to 'llvm/test/CodeGen/R600/fmin_legacy.ll')
| -rw-r--r-- | llvm/test/CodeGen/R600/fmin_legacy.ll | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/llvm/test/CodeGen/R600/fmin_legacy.ll b/llvm/test/CodeGen/R600/fmin_legacy.ll index 2fbdb6bb20c..3f60b609b40 100644 --- a/llvm/test/CodeGen/R600/fmin_legacy.ll +++ b/llvm/test/CodeGen/R600/fmin_legacy.ll @@ -18,7 +18,7 @@ define void @test_fmin_legacy_f32(<4 x float> addrspace(1)* %out, <4 x float> in ; FUNC-LABEL: @test_fmin_legacy_ule_f32 ; SI: buffer_load_dword [[A:v[0-9]+]], {{v\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}, 0 addr64{{$}} -; SI: buffer_load_dword [[B:v[0-9]+]], {{v\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}, 0 addr64 offset:0x4 +; SI: buffer_load_dword [[B:v[0-9]+]], {{v\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}, 0 addr64 offset:4 ; SI: v_min_legacy_f32_e32 {{v[0-9]+}}, [[A]], [[B]] define void @test_fmin_legacy_ule_f32(float addrspace(1)* %out, float addrspace(1)* %in) #0 { %tid = call i32 @llvm.r600.read.tidig.x() #1 @@ -36,7 +36,7 @@ define void @test_fmin_legacy_ule_f32(float addrspace(1)* %out, float addrspace( ; FUNC-LABEL: @test_fmin_legacy_ole_f32 ; SI: buffer_load_dword [[A:v[0-9]+]], {{v\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}, 0 addr64{{$}} -; SI: buffer_load_dword [[B:v[0-9]+]], {{v\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}, 0 addr64 offset:0x4 +; SI: buffer_load_dword [[B:v[0-9]+]], {{v\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}, 0 addr64 offset:4 ; SI: v_min_legacy_f32_e32 {{v[0-9]+}}, [[A]], [[B]] define void @test_fmin_legacy_ole_f32(float addrspace(1)* %out, float addrspace(1)* %in) #0 { %tid = call i32 @llvm.r600.read.tidig.x() #1 @@ -54,7 +54,7 @@ define void @test_fmin_legacy_ole_f32(float addrspace(1)* %out, float addrspace( ; FUNC-LABEL: @test_fmin_legacy_olt_f32 ; SI: buffer_load_dword [[A:v[0-9]+]], {{v\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}, 0 addr64{{$}} -; SI: buffer_load_dword [[B:v[0-9]+]], {{v\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}, 0 addr64 offset:0x4 +; SI: buffer_load_dword [[B:v[0-9]+]], {{v\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}, 0 addr64 offset:4 ; SI: v_min_legacy_f32_e32 {{v[0-9]+}}, [[A]], [[B]] define void @test_fmin_legacy_olt_f32(float addrspace(1)* %out, float addrspace(1)* %in) #0 { %tid = call i32 @llvm.r600.read.tidig.x() #1 @@ -72,7 +72,7 @@ define void @test_fmin_legacy_olt_f32(float addrspace(1)* %out, float addrspace( ; FUNC-LABEL: @test_fmin_legacy_ult_f32 ; SI: buffer_load_dword [[A:v[0-9]+]], {{v\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}, 0 addr64{{$}} -; SI: buffer_load_dword [[B:v[0-9]+]], {{v\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}, 0 addr64 offset:0x4 +; SI: buffer_load_dword [[B:v[0-9]+]], {{v\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}, 0 addr64 offset:4 ; SI: v_min_legacy_f32_e32 {{v[0-9]+}}, [[A]], [[B]] define void @test_fmin_legacy_ult_f32(float addrspace(1)* %out, float addrspace(1)* %in) #0 { %tid = call i32 @llvm.r600.read.tidig.x() #1 |
