R600/SI: Change all instruction assembly names to lowercase.

This matches the format produced by the AMD proprietary driver.

//==================================================================//
// Shell script for converting .ll test cases: (Pass the .ll files
   you want to convert to this script as arguments).
//==================================================================//

; This was necessary on my system so that A-Z in sed would match only
; upper case.  I'm not sure why.
export LC_ALL='C'

TEST_FILES="$*"

MATCHES=`grep -v Patterns SIInstructions.td | grep -o '"[A-Z0-9_]\+["e]' | grep -o '[A-Z0-9_]\+' | sort -r`

for f in $TEST_FILES; do
  # Check that there are SI tests:
  grep -q -e 'verde' -e 'bonaire' -e 'SI' -e 'tahiti' $f
  if [ $? -eq 0 ]; then
    for match in $MATCHES; do
      sed -i -e "s/\([ :]$match\)/\L\1/" $f
    done

    # Try to get check lines with partial instruction names
    sed -i 's/\(;[ ]*SI[A-Z\\-]*: \)\([A-Z_0-9]\+\)/\1\L\2/' $f
  fi
done

sed -i -e 's/bb0_1/BB0_1/g' ../../../test/CodeGen/R600/infinite-loop.ll
sed -i -e 's/SI-NOT: bfe/SI-NOT: {{[^@]}}bfe/g'../../../test/CodeGen/R600/llvm.AMDGPU.bfe.*32.ll ../../../test/CodeGen/R600/sext-in-reg.ll
sed -i -e 's/exp_IEEE/EXP_IEEE/g' ../../../test/CodeGen/R600/llvm.exp2.ll
sed -i -e 's/numVgprs/NumVgprs/g' ../../../test/CodeGen/R600/register-count-comments.ll
sed -i 's/\(; CHECK[-NOT]*: \)\([A-Z_0-9]\+\)/\1\L\2/' ../../../test/CodeGen/R600/select64.ll ../../../test/CodeGen/R600/sgpr-copy.ll

//==================================================================//
// Shell script for converting .td files (run this last)
//==================================================================//

export LC_ALL='C'
sed -i -e '/Patterns/!s/\("[A-Z0-9_]\+[ "e]\)/\L\1/g' SIInstructions.td
sed -i -e 's/"EXP/"exp/g' SIInstrInfo.td

llvm-svn: 221350

1 files changed, 31 insertions, 31 deletions

diff --git a/llvm/test/CodeGen/R600/fmaxnum.f64.ll b/llvm/test/CodeGen/R600/fmaxnum.f64.ll
index af762e108ee..51cbf4dee7c 100644
--- a/llvm/test/CodeGen/R600/fmaxnum.f64.ll
+++ b/llvm/test/CodeGen/R600/fmaxnum.f64.ll
@@ -7,7 +7,7 @@ declare <8 x double> @llvm.maxnum.v8f64(<8 x double>, <8 x double>) #0
 declare <16 x double> @llvm.maxnum.v16f64(<16 x double>, <16 x double>) #0
 
 ; FUNC-LABEL: @test_fmax_f64
-; SI: V_MAX_F64
+; SI: v_max_f64
 define void @test_fmax_f64(double addrspace(1)* %out, double %a, double %b) nounwind {
   %val = call double @llvm.maxnum.f64(double %a, double %b) #0
   store double %val, double addrspace(1)* %out, align 8
@@ -15,8 +15,8 @@ define void @test_fmax_f64(double addrspace(1)* %out, double %a, double %b) noun
 }
 
 ; FUNC-LABEL: @test_fmax_v2f64
-; SI: V_MAX_F64
-; SI: V_MAX_F64
+; SI: v_max_f64
+; SI: v_max_f64
 define void @test_fmax_v2f64(<2 x double> addrspace(1)* %out, <2 x double> %a, <2 x double> %b) nounwind {
   %val = call <2 x double> @llvm.maxnum.v2f64(<2 x double> %a, <2 x double> %b) #0
   store <2 x double> %val, <2 x double> addrspace(1)* %out, align 16
@@ -24,10 +24,10 @@ define void @test_fmax_v2f64(<2 x double> addrspace(1)* %out, <2 x double> %a, <
 }
 
 ; FUNC-LABEL: @test_fmax_v4f64
-; SI: V_MAX_F64
-; SI: V_MAX_F64
-; SI: V_MAX_F64
-; SI: V_MAX_F64
+; SI: v_max_f64
+; SI: v_max_f64
+; SI: v_max_f64
+; SI: v_max_f64
 define void @test_fmax_v4f64(<4 x double> addrspace(1)* %out, <4 x double> %a, <4 x double> %b) nounwind {
   %val = call <4 x double> @llvm.maxnum.v4f64(<4 x double> %a, <4 x double> %b) #0
   store <4 x double> %val, <4 x double> addrspace(1)* %out, align 32
@@ -35,14 +35,14 @@ define void @test_fmax_v4f64(<4 x double> addrspace(1)* %out, <4 x double> %a, <
 }
 
 ; FUNC-LABEL: @test_fmax_v8f64
-; SI: V_MAX_F64
-; SI: V_MAX_F64
-; SI: V_MAX_F64
-; SI: V_MAX_F64
-; SI: V_MAX_F64
-; SI: V_MAX_F64
-; SI: V_MAX_F64
-; SI: V_MAX_F64
+; SI: v_max_f64
+; SI: v_max_f64
+; SI: v_max_f64
+; SI: v_max_f64
+; SI: v_max_f64
+; SI: v_max_f64
+; SI: v_max_f64
+; SI: v_max_f64
 define void @test_fmax_v8f64(<8 x double> addrspace(1)* %out, <8 x double> %a, <8 x double> %b) nounwind {
   %val = call <8 x double> @llvm.maxnum.v8f64(<8 x double> %a, <8 x double> %b) #0
   store <8 x double> %val, <8 x double> addrspace(1)* %out, align 64
@@ -50,22 +50,22 @@ define void @test_fmax_v8f64(<8 x double> addrspace(1)* %out, <8 x double> %a, <
 }
 
 ; FUNC-LABEL: @test_fmax_v16f64
-; SI: V_MAX_F64
-; SI: V_MAX_F64
-; SI: V_MAX_F64
-; SI: V_MAX_F64
-; SI: V_MAX_F64
-; SI: V_MAX_F64
-; SI: V_MAX_F64
-; SI: V_MAX_F64
-; SI: V_MAX_F64
-; SI: V_MAX_F64
-; SI: V_MAX_F64
-; SI: V_MAX_F64
-; SI: V_MAX_F64
-; SI: V_MAX_F64
-; SI: V_MAX_F64
-; SI: V_MAX_F64
+; SI: v_max_f64
+; SI: v_max_f64
+; SI: v_max_f64
+; SI: v_max_f64
+; SI: v_max_f64
+; SI: v_max_f64
+; SI: v_max_f64
+; SI: v_max_f64
+; SI: v_max_f64
+; SI: v_max_f64
+; SI: v_max_f64
+; SI: v_max_f64
+; SI: v_max_f64
+; SI: v_max_f64
+; SI: v_max_f64
+; SI: v_max_f64
 define void @test_fmax_v16f64(<16 x double> addrspace(1)* %out, <16 x double> %a, <16 x double> %b) nounwind {
   %val = call <16 x double> @llvm.maxnum.v16f64(<16 x double> %a, <16 x double> %b) #0
   store <16 x double> %val, <16 x double> addrspace(1)* %out, align 128