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authorTom Stellard <thomas.stellard@amd.com>2013-09-28 02:50:50 +0000
committerTom Stellard <thomas.stellard@amd.com>2013-09-28 02:50:50 +0000
commit0351ea2010e01419aa35e9674587a14cfe559f90 (patch)
tree65d667fcfb434153ce3bfd25e51ba422290e1ac6 /llvm/test/CodeGen/R600/fmax.ll
parent5694d3090a9714de32a08ab56f62444996f65dff (diff)
downloadbcm5719-llvm-0351ea2010e01419aa35e9674587a14cfe559f90.tar.gz
bcm5719-llvm-0351ea2010e01419aa35e9674587a14cfe559f90.zip
R600: Fix handling of NAN in comparison instructions
We were completely ignoring the unorder/ordered attributes of condition codes and also incorrectly lowering seto and setuo. Reviewed-by: Vincent Lejeune<vljn at ovi.com> llvm-svn: 191603
Diffstat (limited to 'llvm/test/CodeGen/R600/fmax.ll')
-rw-r--r--llvm/test/CodeGen/R600/fmax.ll2
1 files changed, 1 insertions, 1 deletions
diff --git a/llvm/test/CodeGen/R600/fmax.ll b/llvm/test/CodeGen/R600/fmax.ll
index 8b704e56484..be25c9ce8d8 100644
--- a/llvm/test/CodeGen/R600/fmax.ll
+++ b/llvm/test/CodeGen/R600/fmax.ll
@@ -5,7 +5,7 @@
define void @test() {
%r0 = call float @llvm.R600.load.input(i32 0)
%r1 = call float @llvm.R600.load.input(i32 1)
- %r2 = fcmp uge float %r0, %r1
+ %r2 = fcmp oge float %r0, %r1
%r3 = select i1 %r2, float %r0, float %r1
call void @llvm.AMDGPU.store.output(float %r3, i32 0)
ret void
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