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| author | czhengsz <czhengsz@cn.ibm.com> | 2019-11-25 21:18:32 -0500 |
|---|---|---|
| committer | czhengsz <czhengsz@cn.ibm.com> | 2019-11-26 23:58:00 -0500 |
| commit | 98189755cd98f6e1e22e03e55b951d3ed53a5ae5 (patch) | |
| tree | 8e91530ec321fe9cc3da8057bcf6e9494025eab1 /llvm/test/CodeGen/PowerPC | |
| parent | fd39b1bb20cec32c310ae9b6f1b4603c17a5f832 (diff) | |
| download | bcm5719-llvm-98189755cd98f6e1e22e03e55b951d3ed53a5ae5.tar.gz bcm5719-llvm-98189755cd98f6e1e22e03e55b951d3ed53a5ae5.zip | |
[PowerPC] [NFC] change PPCLoopPreIncPrep class name after D67088.
Afer https://reviews.llvm.org/D67088, PPCLoopPreIncPrep pass can prepare more instruction forms except pre inc form, like DS/DQ forms.
This patch is a follow-up of https://reviews.llvm.org/D67088 to rename the pass name.
Reviewed by: jsji
Differential Revision: https://reviews.llvm.org/D70371
Diffstat (limited to 'llvm/test/CodeGen/PowerPC')
| -rw-r--r-- | llvm/test/CodeGen/PowerPC/addi-licm.ll | 2 | ||||
| -rw-r--r-- | llvm/test/CodeGen/PowerPC/ppc-passname.ll | 20 |
2 files changed, 11 insertions, 11 deletions
diff --git a/llvm/test/CodeGen/PowerPC/addi-licm.ll b/llvm/test/CodeGen/PowerPC/addi-licm.ll index e0314d19bd3..24c9805f134 100644 --- a/llvm/test/CodeGen/PowerPC/addi-licm.ll +++ b/llvm/test/CodeGen/PowerPC/addi-licm.ll @@ -1,4 +1,4 @@ -; RUN: llc -verify-machineinstrs -mcpu=pwr7 -disable-ppc-preinc-prep < %s | FileCheck %s +; RUN: llc -verify-machineinstrs -mcpu=pwr7 -disable-ppc-instr-form-prep < %s | FileCheck %s ; RUN: llc -verify-machineinstrs -mcpu=pwr7 < %s | FileCheck %s -check-prefix=PIP target datalayout = "E-m:e-i64:64-n32:64" target triple = "powerpc64-unknown-linux-gnu" diff --git a/llvm/test/CodeGen/PowerPC/ppc-passname.ll b/llvm/test/CodeGen/PowerPC/ppc-passname.ll index 005f0a25c56..98343bdb535 100644 --- a/llvm/test/CodeGen/PowerPC/ppc-passname.ll +++ b/llvm/test/CodeGen/PowerPC/ppc-passname.ll @@ -1,13 +1,13 @@ -; Test pass name: ppc-loop-preinc-prep. -; RUN: llc -mtriple=powerpc64le-unknown-unknown < %s -debug-pass=Structure -stop-before=ppc-loop-preinc-prep -o /dev/null 2>&1 | FileCheck %s -check-prefix=STOP-BEFORE-LOOP-PREINC-PREP -; STOP-BEFORE-LOOP-PREINC-PREP-NOT: -ppc-loop-preinc-prep -; STOP-BEFORE-LOOP-PREINC-PREP-NOT: "ppc-loop-preinc-prep" pass is not registered. -; STOP-BEFORE-LOOP-PREINC-PREP-NOT: Prepare loop for pre-inc. addressing modes - -; RUN: llc -mtriple=powerpc64le-unknown-unknown < %s -debug-pass=Structure -stop-after=ppc-loop-preinc-prep -o /dev/null 2>&1 | FileCheck %s -check-prefix=STOP-AFTER-LOOP-PREINC-PREP -; STOP-AFTER-LOOP-PREINC-PREP: -ppc-loop-preinc-prep -; STOP-AFTER-LOOP-PREINC-PREP-NOT: "ppc-loop-preinc-prep" pass is not registered. -; STOP-AFTER-LOOP-PREINC-PREP: Prepare loop for pre-inc. addressing modes +; Test pass name: ppc-loop-instr-form-prep. +; RUN: llc -mtriple=powerpc64le-unknown-unknown < %s -debug-pass=Structure -stop-before=ppc-loop-instr-form-prep -o /dev/null 2>&1 | FileCheck %s -check-prefix=STOP-BEFORE-LOOP-INSTR-FORM-PREP +; STOP-BEFORE-LOOP-INSTR-FORM-PREP-NOT: -ppc-loop-instr-form-prep +; STOP-BEFORE-LOOP-INSTR-FORM-PREP-NOT: "ppc-loop-instr-form-prep" pass is not registered. +; STOP-BEFORE-LOOP-INSTR-FORM-PREP-NOT: Prepare loop for ppc preferred instruction forms + +; RUN: llc -mtriple=powerpc64le-unknown-unknown < %s -debug-pass=Structure -stop-after=ppc-loop-instr-form-prep -o /dev/null 2>&1 | FileCheck %s -check-prefix=STOP-AFTER-LOOP-INSTR-FORM-PREP +; STOP-AFTER-LOOP-INSTR-FORM-PREP: -ppc-loop-instr-form-prep +; STOP-AFTER-LOOP-INSTR-FORM-PREP-NOT: "ppc-loop-instr-form-prep" pass is not registered. +; STOP-AFTER-LOOP-INSTR-FORM-PREP: Prepare loop for ppc preferred instruction forms ; Test pass name: ppc-toc-reg-deps. |
