[NFC][PowerPC]Change ADDIStocHA to ADDIStocHA8 to follow 64-bit naming convention

Summary:

Since we are planning to add ADDIStocHA for 32bit in later patch, we decided
 to change 64bit one first to follow naming convention with 8 behind opcode.

Patch by: Xiangling_L

Differential Revision: https://reviews.llvm.org/D64814

llvm-svn: 366731

5 files changed, 14 insertions, 14 deletions

diff --git a/llvm/test/CodeGen/PowerPC/2013-07-01-PHIElimBug.mir b/llvm/test/CodeGen/PowerPC/2013-07-01-PHIElimBug.mir
index a46d21e3646..af5fb48b22d 100644
--- a/llvm/test/CodeGen/PowerPC/2013-07-01-PHIElimBug.mir
+++ b/llvm/test/CodeGen/PowerPC/2013-07-01-PHIElimBug.mir
@@ -26,7 +26,7 @@ body:             |
   bb.0:
     liveins: $x2
 
-    %0:g8rc_and_g8rc_nox0 = ADDIStocHA $x2, @g_51
+    %0:g8rc_and_g8rc_nox0 = ADDIStocHA8 $x2, @g_51
     %1:g8rc_and_g8rc_nox0 = LDtocL @g_51, killed %0, implicit $x2 :: (load 8)
     %2:gprc = LI 0
     %3:crrc = CMPLWI killed %2, 0
@@ -62,7 +62,7 @@ body:             |
 # the full MIR like this.
 #
 # CHECK:       bb.0:
-# CHECK:         %0:g8rc_and_g8rc_nox0 = ADDIStocHA $x2, @g_51
+# CHECK:         %0:g8rc_and_g8rc_nox0 = ADDIStocHA8 $x2, @g_51
 # CHECK-NEXT:    %1:g8rc_and_g8rc_nox0 = LDtocL @g_51, killed %0, implicit killed $x2 :: (load 8)
 # CHECK-NEXT:    %2:gprc = LI 0
 # CHECK-NEXT:    %3:crrc = CMPLWI killed %2, 0
diff --git a/llvm/test/CodeGen/PowerPC/aantidep-def-ec.mir b/llvm/test/CodeGen/PowerPC/aantidep-def-ec.mir
index 7f224379c35..5ea1341f487 100644
--- a/llvm/test/CodeGen/PowerPC/aantidep-def-ec.mir
+++ b/llvm/test/CodeGen/PowerPC/aantidep-def-ec.mir
@@ -77,7 +77,7 @@ body:             |
     $x30 = OR8 $x4, $x4
     $x3 = LD 0, killed $x3 :: (load 8 from %ir.p1)
     $x29 = ADDI8 killed $x3, -48
-    $x3 = ADDIStocHA $x2, @tasklist_lock
+    $x3 = ADDIStocHA8 $x2, @tasklist_lock
     $x3 = LDtocL @tasklist_lock, killed $x3, implicit $x2 :: (load 8 from got)
     BL8_NOP @__raw_read_unlock, csr_svr464_altivec, implicit-def $lr8, implicit $rm, implicit $x3, implicit $x2, implicit-def $r1, implicit-def dead $x3
     $r3 = LI 0
diff --git a/llvm/test/CodeGen/PowerPC/licm-tocReg.ll b/llvm/test/CodeGen/PowerPC/licm-tocReg.ll
index 82e44ef7b85..246bf7fbc20 100644
--- a/llvm/test/CodeGen/PowerPC/licm-tocReg.ll
+++ b/llvm/test/CodeGen/PowerPC/licm-tocReg.ll
@@ -1,6 +1,6 @@
 ; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-linux-gnu < %s | FileCheck %s
 
-; The instructions ADDIStocHA/LDtocL are used to calculate the address of
+; The instructions ADDIStocHA8/LDtocL are used to calculate the address of
 ; globals. The ones that are in bb.3.if.end could not be hoisted by Machine
 ; LICM due to BCTRL_LDinto_toc in bb2.if.then.  This call causes the compiler
 ; to insert a save TOC to stack before the call and load into X2 to restore TOC
@@ -16,10 +16,10 @@
 ;    liveins: %x3
 ;
 ;    %4 = COPY %x3
-;    %5 = ADDIStocHA %x2, @ga
+;    %5 = ADDIStocHA8 %x2, @ga
 ;    %6 = LDtocL @ga, killed %5 :: (load 8 from got)
 ;    %7 = LWZ 0, %6 :: (volatile dereferenceable load 4 from @ga)
-;    %8 = ADDIStocHA %x2, @gb
+;    %8 = ADDIStocHA8 %x2, @gb
 ;    %9 = LDtocL @gb, killed %8 :: (load 8 from got)
 ;    %10 = LWZ 0, killed %9 :: (volatile dereferenceable load 4 from @gb)
 ;    %0 = LWZ 0, %6 :: (volatile dereferenceable load 4 from @ga)
@@ -47,11 +47,11 @@
 ;
 ;    %2 = PHI %0, %bb.0.entry, %3, %bb.3.if.end
 ;    %12 = ADDI %2, 1
-;    %13 = ADDIStocHA %x2, @ga
+;    %13 = ADDIStocHA8 %x2, @ga
 ;    %14 = LDtocL @ga, killed %13 :: (load 8 from got)
 ;    STW killed %12, 0, %14 :: (volatile store 4 into @ga)
 ;    %15 = LWZ 0, %14 :: (volatile dereferenceable load 4 from @ga)
-;    %16 = ADDIStocHA %x2, @gb
+;    %16 = ADDIStocHA8 %x2, @gb
 ;    %17 = LDtocL @gb, killed %16 :: (load 8 from got)
 ;    %18 = LWZ 0, killed %17 :: (volatile dereferenceable load 4 from @gb)
 ;    %3 = LWZ 0, %14 :: (volatile dereferenceable load 4 from @ga)
diff --git a/llvm/test/CodeGen/PowerPC/no-rlwimi-trivial-commute.mir b/llvm/test/CodeGen/PowerPC/no-rlwimi-trivial-commute.mir
index c43af3b0ca8..22aabf07c2f 100644
--- a/llvm/test/CodeGen/PowerPC/no-rlwimi-trivial-commute.mir
+++ b/llvm/test/CodeGen/PowerPC/no-rlwimi-trivial-commute.mir
@@ -70,7 +70,7 @@ body:             |
   bb.0.entry:
     liveins: $x2
 
-    %0 = ADDIStocHA $x2, @b
+    %0 = ADDIStocHA8 $x2, @b
     %1 = LD target-flags(ppc-toc-lo) @b, killed %0 :: (load 8 from @b)
     %2 = LWZ 0, %1 :: (load 4 from %ir.0)
     %3 = LI 0
diff --git a/llvm/test/CodeGen/PowerPC/remove-copy-crunsetcrbit.mir b/llvm/test/CodeGen/PowerPC/remove-copy-crunsetcrbit.mir
index 7ede66c32e4..91694711604 100644
--- a/llvm/test/CodeGen/PowerPC/remove-copy-crunsetcrbit.mir
+++ b/llvm/test/CodeGen/PowerPC/remove-copy-crunsetcrbit.mir
@@ -110,7 +110,7 @@ body:             |
     successors: %bb.5(0x30000000), %bb.1(0x50000000)
     liveins: $x2
 
-    %3:g8rc_and_g8rc_nox0 = ADDIStocHA $x2, @b
+    %3:g8rc_and_g8rc_nox0 = ADDIStocHA8 $x2, @b
     %4:gprc = LWZ target-flags(ppc-toc-lo) @b, killed %3, implicit $x2 :: (dereferenceable load 4 from @b)
     %5:crrc = CMPLWI killed %4, 0
     BCC 76, killed %5, %bb.5
@@ -120,16 +120,16 @@ body:             |
     successors: %bb.2(0x80000000)
     liveins: $x2
 
-    %6:g8rc_and_g8rc_nox0 = ADDIStocHA $x2, @d
+    %6:g8rc_and_g8rc_nox0 = ADDIStocHA8 $x2, @d
     %7:gprc = LWZ target-flags(ppc-toc-lo) @d, killed %6, implicit $x2 :: (dereferenceable load 4 from @d)
     %8:crrc = CMPWI killed %7, 0
     %0:crbitrc = COPY killed %8.sub_eq
     %9:crbitrc = CRUNSET
     %19:gprc_and_gprc_nor0 = LI 0
     %20:gprc_and_gprc_nor0 = LI 1
-    %22:g8rc_and_g8rc_nox0 = ADDIStocHA $x2, @c
-    %10:g8rc_and_g8rc_nox0 = ADDIStocHA $x2, @e
-    %13:g8rc_and_g8rc_nox0 = ADDIStocHA $x2, @a
+    %22:g8rc_and_g8rc_nox0 = ADDIStocHA8 $x2, @c
+    %10:g8rc_and_g8rc_nox0 = ADDIStocHA8 $x2, @e
+    %13:g8rc_and_g8rc_nox0 = ADDIStocHA8 $x2, @a
     %14:g8rc_and_g8rc_nox0 = ADDItocL killed %13, @a, implicit $x2
 
   bb.2.while.body: