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| author | Lei Huang <lei@ca.ibm.com> | 2018-03-19 18:52:20 +0000 |
|---|---|---|
| committer | Lei Huang <lei@ca.ibm.com> | 2018-03-19 18:52:20 +0000 |
| commit | 6d1596a98c47d026d855fd882ea5708b232d9a66 (patch) | |
| tree | 575bef4deadea7358f495042adc1b5f7b623667f /llvm/test/CodeGen/PowerPC | |
| parent | d9d5bd3067a6cb8d036514d9f74079d1c8ad7ef9 (diff) | |
| download | bcm5719-llvm-6d1596a98c47d026d855fd882ea5708b232d9a66.tar.gz bcm5719-llvm-6d1596a98c47d026d855fd882ea5708b232d9a66.zip | |
[PowerPC][Power9]Legalize and emit code for quad-precision add/div/mul/sub
Legalize and emit code for quad-precision floating point operations:
* xsaddqp
* xssubqp
* xsdivqp
* xsmulqp
Differential Revision: https://reviews.llvm.org/D44506
llvm-svn: 327878
Diffstat (limited to 'llvm/test/CodeGen/PowerPC')
| -rw-r--r-- | llvm/test/CodeGen/PowerPC/f128-arith.ll | 73 |
1 files changed, 73 insertions, 0 deletions
diff --git a/llvm/test/CodeGen/PowerPC/f128-arith.ll b/llvm/test/CodeGen/PowerPC/f128-arith.ll new file mode 100644 index 00000000000..540754d2f7b --- /dev/null +++ b/llvm/test/CodeGen/PowerPC/f128-arith.ll @@ -0,0 +1,73 @@ +; RUN: llc -mcpu=pwr9 -mtriple=powerpc64le-unknown-unknown < %s | FileCheck %s + +; Function Attrs: norecurse nounwind +define void @qpAdd(fp128* nocapture readonly %a, fp128* nocapture %res) { +entry: + %0 = load fp128, fp128* %a, align 16 + %add = fadd fp128 %0, %0 + store fp128 %add, fp128* %res, align 16 + ret void +; CHECK-LABEL: qpAdd +; CHECK-NOT bl __addtf3 +; CHECK xsaddqp +; CHECK stxv +; CHECK blr +} + +; Function Attrs: norecurse nounwind +define void @qpSub(fp128* nocapture readonly %a, fp128* nocapture %res) { +entry: + %0 = load fp128, fp128* %a, align 16 + %sub = fsub fp128 %0, %0 + store fp128 %sub, fp128* %res, align 16 + ret void +; CHECK-LABEL: qpSub +; CHECK-NOT bl __subtf3 +; CHECK xssubqp +; CHECK stxv +; CHECK blr +} + +; Function Attrs: norecurse nounwind +define void @qpMul(fp128* nocapture readonly %a, fp128* nocapture %res) { +entry: + %0 = load fp128, fp128* %a, align 16 + %mul = fmul fp128 %0, %0 + store fp128 %mul, fp128* %res, align 16 + ret void +; CHECK-LABEL: qpMul +; CHECK-NOT bl __multf3 +; CHECK xsmulqp +; CHECK stxv +; CHECK blr +} + +; Function Attrs: norecurse nounwind +define void @qpDiv(fp128* nocapture readonly %a, fp128* nocapture %res) { +entry: + %0 = load fp128, fp128* %a, align 16 + %div = fdiv fp128 %0, %0 + store fp128 %div, fp128* %res, align 16 + ret void +; CHECK-LABEL: qpDiv +; CHECK-NOT bl __divtf3 +; CHECK xsdivqp +; CHECK stxv +; CHECK blr +} + +define void @testLdNSt(i8* nocapture readonly %PtrC, fp128* nocapture %PtrF) { +entry: + %add.ptr = getelementptr inbounds i8, i8* %PtrC, i64 4 + %0 = bitcast i8* %add.ptr to fp128* + %1 = load fp128, fp128* %0, align 16 + %2 = bitcast fp128* %PtrF to i8* + %add.ptr1 = getelementptr inbounds i8, i8* %2, i64 8 + %3 = bitcast i8* %add.ptr1 to fp128* + store fp128 %1, fp128* %3, align 16 + ret void +; CHECK-LABEL: testLdNSt +; CHECK lxvx +; CHECK stxvx +; CHECK-NEXT blr +} |

