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| author | Sanjay Patel <spatel@rotateright.com> | 2016-10-19 16:58:59 +0000 |
|---|---|---|
| committer | Sanjay Patel <spatel@rotateright.com> | 2016-10-19 16:58:59 +0000 |
| commit | 3a3aaf67e07ade866b9500a9466086a68d0dd70c (patch) | |
| tree | 15006d3cec17160af880cfd3669c039ad95dd5ea /llvm/test/CodeGen/PowerPC | |
| parent | 383803230bba0c0dea3d93d9eb4f97d6fa8f3718 (diff) | |
| download | bcm5719-llvm-3a3aaf67e07ade866b9500a9466086a68d0dd70c.tar.gz bcm5719-llvm-3a3aaf67e07ade866b9500a9466086a68d0dd70c.zip | |
[DAG] optimize negation of bool
Use mask and negate for legalization of i1 source type with SIGN_EXTEND_INREG.
With the mask, this should be no worse than 2 shifts. The mask can be eliminated
in some cases, so that should be better than 2 shifts.
This change exposed some missing folds related to negation:
https://reviews.llvm.org/rL284239
https://reviews.llvm.org/rL284395
There may be others, so please let me know if you see any regressions.
Differential Revision: https://reviews.llvm.org/D25485
llvm-svn: 284611
Diffstat (limited to 'llvm/test/CodeGen/PowerPC')
| -rw-r--r-- | llvm/test/CodeGen/PowerPC/negate-i1.ll | 13 |
1 files changed, 6 insertions, 7 deletions
diff --git a/llvm/test/CodeGen/PowerPC/negate-i1.ll b/llvm/test/CodeGen/PowerPC/negate-i1.ll index 17cf82d163c..c6a7867fe9d 100644 --- a/llvm/test/CodeGen/PowerPC/negate-i1.ll +++ b/llvm/test/CodeGen/PowerPC/negate-i1.ll @@ -1,12 +1,12 @@ -; RUN: llc < %s -mtriple=powerpc64-apple-darwin | FileCheck %s +; RUN: llc -verify-machineinstrs < %s -mtriple=powerpc64le-unknown-linux-gnu | FileCheck %s ; PR30661 - https://llvm.org/bugs/show_bug.cgi?id=30661 define i32 @select_i32_neg1_or_0(i1 %a) { ; CHECK-LABEL: select_i32_neg1_or_0: -; CHECK: ; BB#0: -; CHECK-NEXT: sldi r2, r3, 63 -; CHECK-NEXT: sradi r3, r2, 63 +; CHECK: # BB#0: +; CHECK-NEXT: clrldi 3, 3, 63 +; CHECK-NEXT: neg 3, 3 ; CHECK-NEXT: blr ; %b = sext i1 %a to i32 @@ -15,9 +15,8 @@ define i32 @select_i32_neg1_or_0(i1 %a) { define i32 @select_i32_neg1_or_0_zeroext(i1 zeroext %a) { ; CHECK-LABEL: select_i32_neg1_or_0_zeroext: -; CHECK: ; BB#0: -; CHECK-NEXT: sldi r2, r3, 63 -; CHECK-NEXT: sradi r3, r2, 63 +; CHECK: # BB#0: +; CHECK-NEXT: neg 3, 3 ; CHECK-NEXT: blr ; %b = sext i1 %a to i32 |
