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| author | Zheng Chen <czhengsz@cn.ibm.com> | 2020-01-08 20:54:15 -0500 |
|---|---|---|
| committer | Zheng Chen <czhengsz@cn.ibm.com> | 2020-01-08 20:59:08 -0500 |
| commit | 26ba160d47220a0bce75b1f491bf6e262edf69fa (patch) | |
| tree | 4478701a3b6d162d02202f2450efdd62a7b02468 /llvm/test/CodeGen/PowerPC | |
| parent | 338a601612ca36e112b14f622eb310985b93192a (diff) | |
| download | bcm5719-llvm-26ba160d47220a0bce75b1f491bf6e262edf69fa.tar.gz bcm5719-llvm-26ba160d47220a0bce75b1f491bf6e262edf69fa.zip | |
[PowerPC] when folding rlwinm+rlwinm. to andi., we should use first rlwinm
input reg.
%2:gprc = RLWINM %1:gprc, 27, 5, 10
%3:gprc = RLWINM_rec %2:gprc, 8, 5, 10, implicit-def $cr0
==>
%3:gprc = ANDI_rec %1, 0, implicit-def $cr0
we should use %1 instead of %2 as ANDI_rec input.
Reviewed By: steven.zhang
Differential Revision: https://reviews.llvm.org/D71885
Diffstat (limited to 'llvm/test/CodeGen/PowerPC')
| -rw-r--r-- | llvm/test/CodeGen/PowerPC/fold-rlwinm.mir | 21 |
1 files changed, 18 insertions, 3 deletions
diff --git a/llvm/test/CodeGen/PowerPC/fold-rlwinm.mir b/llvm/test/CodeGen/PowerPC/fold-rlwinm.mir index f2e576ed73b..410f688204c 100644 --- a/llvm/test/CodeGen/PowerPC/fold-rlwinm.mir +++ b/llvm/test/CodeGen/PowerPC/fold-rlwinm.mir @@ -118,7 +118,7 @@ body: | %0:g8rc = COPY $x3 %1:gprc = COPY %0.sub_32:g8rc %2:gprc = RLWINM %1:gprc, 27, 5, 10 - ; CHECK: %2:gprc = RLWINM %1, 27, 5, 10 + ; CHECK-NOT: RLWINM %1, %3:gprc = RLWINM %2:gprc, 8, 5, 10 ; CHECK: %3:gprc = LI 0 BLR8 implicit $lr8, implicit $rm @@ -133,9 +133,24 @@ body: | %0:g8rc = COPY $x3 %1:gprc = COPY %0.sub_32:g8rc %2:gprc = RLWINM %1:gprc, 27, 5, 10 - ; CHECK: %2:gprc = RLWINM %1, 27, 5, 10 + ; CHECK-NOT: RLWINM %1, %3:gprc = RLWINM_rec %2:gprc, 8, 5, 10, implicit-def $cr0 - ; CHECK: %3:gprc = ANDI_rec %2, 0, implicit-def $cr0 + ; CHECK: %3:gprc = ANDI_rec %1, 0, implicit-def $cr0 + BLR8 implicit $lr8, implicit $rm +... +--- +name: testFoldRLWINMoToZeroSrcCanNotBeDeleted +#CHECK : name : testFoldRLWINMoToZeroSrcCanNotBeDeleted +tracksRegLiveness: true +body: | + bb.0.entry: + liveins: $x3 + %0:g8rc = COPY $x3 + %1:gprc = COPY %0.sub_32:g8rc + %2:gprc = RLWINM_rec %1:gprc, 27, 5, 10, implicit-def $cr0 + ; CHECK: %2:gprc = RLWINM_rec %1, 27, 5, 10, implicit-def $cr0 + %3:gprc = RLWINM_rec %2:gprc, 8, 5, 10, implicit-def $cr0 + ; CHECK: %3:gprc = ANDI_rec %1, 0, implicit-def $cr0 BLR8 implicit $lr8, implicit $rm ... --- |
