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authorXiangling Liao <Xiangling.Liao@ibm.com>2020-01-07 10:53:24 -0500
committerXiangling Liao <Xiangling.Liao@ibm.com>2020-01-14 09:39:02 -0500
commit25a8aec7f37b970849ccf5f2893431e2ca858709 (patch)
tree2a844e89de6435d4201b8526acef0899bf16a025 /llvm/test/CodeGen/PowerPC
parent4b5bc38802dcc7d2c6d7f5af1eca1755bd0fd9cb (diff)
downloadbcm5719-llvm-25a8aec7f37b970849ccf5f2893431e2ca858709.tar.gz
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[AIX] ExternalSymbolSDNode lowering
For memcpy/memset/memmove etc., replace ExternalSymbolSDNode with a MCSymbolSDNode, which have a prefix dot before function name as entry point symbol. Differential Revision: https://reviews.llvm.org/D70718
Diffstat (limited to 'llvm/test/CodeGen/PowerPC')
-rw-r--r--llvm/test/CodeGen/PowerPC/aix-external-sym-sdnode-lowering.ll128
-rw-r--r--llvm/test/CodeGen/PowerPC/aix-user-defined-memcpy.ll58
2 files changed, 186 insertions, 0 deletions
diff --git a/llvm/test/CodeGen/PowerPC/aix-external-sym-sdnode-lowering.ll b/llvm/test/CodeGen/PowerPC/aix-external-sym-sdnode-lowering.ll
new file mode 100644
index 00000000000..f5864df4ff9
--- /dev/null
+++ b/llvm/test/CodeGen/PowerPC/aix-external-sym-sdnode-lowering.ll
@@ -0,0 +1,128 @@
+; RUN: llc -mcpu=pwr4 -mattr=-altivec -verify-machineinstrs -mtriple powerpc-ibm-aix-xcoff \
+; RUN: -stop-after=machine-cp < %s | FileCheck \
+; RUN: --check-prefix=32BIT %s
+
+; RUN: llc -mcpu=pwr4 -mattr=-altivec -verify-machineinstrs -mtriple powerpc64-ibm-aix-xcoff \
+; RUN: -stop-after=machine-cp < %s | FileCheck \
+; RUN: --check-prefix=64BIT %s
+
+define i64 @call_divdi3(i64 %p, i64 %num) {
+entry:
+ %div = sdiv i64 %p, %num
+ ret i64 %div
+}
+
+; 32BIT: BL_NOP <mcsymbol .__divdi3>
+
+define i64 @call_fixunsdfdi(double %p) {
+entry:
+ %conv = fptoui double %p to i64
+ ret i64 %conv
+}
+
+; 32BIT: BL_NOP <mcsymbol .__fixunsdfdi>
+
+define double @call_floatundidf(i64 %p) {
+entry:
+ %conv = uitofp i64 %p to double
+ ret double %conv
+}
+
+; 32BIT: BL_NOP <mcsymbol .__floatundidf>
+
+define float @call_floatundisf(i64 %p) {
+entry:
+ %conv = uitofp i64 %p to float
+ ret float %conv
+}
+
+; 32BIT: BL_NOP <mcsymbol .__floatundisf>
+
+define i64 @call_moddi3(i64 %p, i64 %num) {
+entry:
+ %rem = srem i64 %p, %num
+ ret i64 %rem
+}
+
+; 32BIT: BL_NOP <mcsymbol .__moddi3>
+
+define i64 @call_udivdi3(i64 %p, i64 %q) {
+ %1 = udiv i64 %p, %q
+ ret i64 %1
+}
+
+; 32BIT: BL_NOP <mcsymbol .__udivdi3>
+
+define i64 @call_umoddi3(i64 %p, i64 %num) {
+entry:
+ %rem = urem i64 %p, %num
+ ret i64 %rem
+}
+
+; 32BIT: BL_NOP <mcsymbol .__umoddi3>
+
+define double @call_ceil(double %n) {
+entry:
+ %0 = call double @llvm.ceil.f64(double %n)
+ ret double %0
+}
+
+declare double @llvm.ceil.f64(double)
+
+; 32BIT: BL_NOP <mcsymbol .ceil>
+; 64BIT: BL8_NOP <mcsymbol .ceil>
+
+define double @call_floor(double %n) {
+entry:
+ %0 = call double @llvm.floor.f64(double %n)
+ ret double %0
+}
+
+declare double @llvm.floor.f64(double)
+
+; 32BIT: BL_NOP <mcsymbol .floor>
+; 64BIT: BL8_NOP <mcsymbol .floor>
+
+define void @call_memcpy(i8* %p, i8* %q, i32 %n) {
+entry:
+ call void @llvm.memcpy.p0i8.p0i8.i32(i8* %p, i8* %q, i32 %n, i1 false)
+ ret void
+}
+
+declare void @llvm.memcpy.p0i8.p0i8.i32(i8* nocapture writeonly, i8* nocapture readonly, i32, i1)
+
+; 32BIT: BL_NOP <mcsymbol .memcpy>
+; 64BIT: BL8_NOP <mcsymbol .memcpy>
+
+define void @call_memmove(i8* %p, i8* %q, i32 %n) {
+entry:
+ call void @llvm.memmove.p0i8.p0i8.i32(i8* %p, i8* %q, i32 %n, i1 false)
+ ret void
+}
+
+declare void @llvm.memmove.p0i8.p0i8.i32(i8* nocapture, i8* nocapture readonly, i32, i1)
+
+; 32BIT: BL_NOP <mcsymbol .memmove>
+; 64BIT: BL8_NOP <mcsymbol .memmove>
+
+define void @call_memset(i8* %p, i8 %q, i32 %n) #0 {
+entry:
+ call void @llvm.memset.p0i8.i32(i8* %p, i8 %q, i32 %n, i1 false)
+ ret void
+}
+
+declare void @llvm.memset.p0i8.i32(i8* nocapture, i8, i32, i1)
+
+; 32BIT: BL_NOP <mcsymbol .memset>
+; 64BIT: BL8_NOP <mcsymbol .memset>
+
+define double @call_round(double %n) {
+entry:
+ %0 = call double @llvm.round.f64(double %n)
+ ret double %0
+}
+
+declare double @llvm.round.f64(double)
+
+; 32BIT: BL_NOP <mcsymbol .round>
+; 64BIT: BL8_NOP <mcsymbol .round>
diff --git a/llvm/test/CodeGen/PowerPC/aix-user-defined-memcpy.ll b/llvm/test/CodeGen/PowerPC/aix-user-defined-memcpy.ll
new file mode 100644
index 00000000000..0b892a3ded6
--- /dev/null
+++ b/llvm/test/CodeGen/PowerPC/aix-user-defined-memcpy.ll
@@ -0,0 +1,58 @@
+; RUN: llc -verify-machineinstrs -mtriple powerpc-ibm-aix-xcoff -mcpu=pwr4 \
+; RUN: -mattr=-altivec -filetype=obj -o %t.o < %s
+
+; RUN: llvm-readobj --syms %t.o | FileCheck --check-prefix=32-SYM %s
+
+; RUN: llvm-readobj --relocs --expand-relocs %t.o | FileCheck \
+; RUN: --check-prefix=32-REL %s
+
+; RUN: not llc -verify-machineinstrs -mtriple powerpc64-ibm-aix-xcoff \
+; RUN: -mcpu=pwr4 -mattr=-altivec -filetype=obj < %s 2>&1 | FileCheck \
+; RUN: --check-prefix=64-CHECK %s
+
+; Test verifies:
+; If there exists a user-defined function whose name is the same as the
+; "memcpy" ExternalSymbol's, we pick up the user-defined version, even if this
+; may lead to some undefined behavior.
+
+define dso_local signext i32 @memcpy(i8* %destination, i32 signext %num) {
+entry:
+ ret i32 3
+}
+
+define void @call_memcpy(i8* %p, i8* %q, i32 %n) {
+entry:
+ call void @llvm.memcpy.p0i8.p0i8.i32(i8* %p, i8* %q, i32 %n, i1 false)
+ ret void
+}
+
+declare void @llvm.memcpy.p0i8.p0i8.i32(i8* nocapture writeonly, i8* nocapture readonly, i32, i1)
+
+; TODO: This test should preferably check the symbol table for .o file and
+; the relocation associated with the call.
+
+; 32-SYM: Symbol {{[{][[:space:]] *}}Index: [[#Index:]]{{[[:space:]] *}}Name: .memcpy
+; 32-SYM-NEXT: Value (RelocatableAddress): 0x0
+; 32-SYM-NEXT: Section: .text
+; 32-SYM-NEXT: Type: 0x0
+; 32-SYM-NEXT: StorageClass: C_EXT (0x2)
+; 32-SYM-NEXT: NumberOfAuxEntries: 1
+; 32-SYM-NEXT: CSECT Auxiliary Entry {
+; 32-SYM-NEXT: Index: 3
+; 32-SYM-NEXT: ContainingCsectSymbolIndex: 0
+; 32-SYM-NEXT: ParameterHashIndex: 0x0
+; 32-SYM-NEXT: TypeChkSectNum: 0x0
+; 32-SYM-NEXT: SymbolAlignmentLog2: 0
+; 32-SYM-NEXT: SymbolType: XTY_LD (0x2)
+; 32-SYM-NEXT: StorageMappingClass: XMC_PR (0x0)
+; 32-SYM-NEXT: StabInfoIndex: 0x0
+; 32-SYM-NEXT: StabSectNum: 0x0
+; 32-SYM-NEXT: }
+; 32-SYM-NEXT: }
+
+; 32-SYM-NOT: .memcpy
+
+; We are expecting to have the test fail when the support for relocations land.
+; 32-REL-NOT: Relocation{{[[:space:]]}}
+
+; 64-CHECK: LLVM ERROR: 64-bit XCOFF object files are not supported yet.
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