diff options
| author | Dale Johannesen <dalej@apple.com> | 2008-03-31 23:20:09 +0000 |
|---|---|---|
| committer | Dale Johannesen <dalej@apple.com> | 2008-03-31 23:20:09 +0000 |
| commit | 0de94a1712500947ad743b7320dd17498f20a643 (patch) | |
| tree | 1a4e6b62e1e2485cba01e317030af3943f9e0f25 /llvm/test/CodeGen/PowerPC | |
| parent | e4f77c69ac8909f7272c5e25e4857c8f9305618e (diff) | |
| download | bcm5719-llvm-0de94a1712500947ad743b7320dd17498f20a643.tar.gz bcm5719-llvm-0de94a1712500947ad743b7320dd17498f20a643.zip | |
Mark functions in some tests as 'nounwind'. Generating
EH info for these functions causes the tests to fail for
random reasons (e.g. looking for 'or' or counting lines
with asm-printer; labels count as lines.)
llvm-svn: 49003
Diffstat (limited to 'llvm/test/CodeGen/PowerPC')
| -rw-r--r-- | llvm/test/CodeGen/PowerPC/fold-li.ll | 4 | ||||
| -rw-r--r-- | llvm/test/CodeGen/PowerPC/reg-coalesce-simple.ll | 2 | ||||
| -rw-r--r-- | llvm/test/CodeGen/PowerPC/rotl-2.ll | 8 |
3 files changed, 7 insertions, 7 deletions
diff --git a/llvm/test/CodeGen/PowerPC/fold-li.ll b/llvm/test/CodeGen/PowerPC/fold-li.ll index e96bc456c56..ae336338911 100644 --- a/llvm/test/CodeGen/PowerPC/fold-li.ll +++ b/llvm/test/CodeGen/PowerPC/fold-li.ll @@ -3,12 +3,12 @@ ;; Test that immediates are folded into these instructions correctly. -define i32 @ADD(i32 %X) { +define i32 @ADD(i32 %X) nounwind { %Y = add i32 %X, 65537 ; <i32> [#uses=1] ret i32 %Y } -define i32 @SUB(i32 %X) { +define i32 @SUB(i32 %X) nounwind { %Y = sub i32 %X, 65537 ; <i32> [#uses=1] ret i32 %Y } diff --git a/llvm/test/CodeGen/PowerPC/reg-coalesce-simple.ll b/llvm/test/CodeGen/PowerPC/reg-coalesce-simple.ll index dccf21e1720..2c301a9b8d1 100644 --- a/llvm/test/CodeGen/PowerPC/reg-coalesce-simple.ll +++ b/llvm/test/CodeGen/PowerPC/reg-coalesce-simple.ll @@ -2,7 +2,7 @@ %struct.foo = type { i32, i32, [0 x i8] } -define i32 @test(%struct.foo* %X) { +define i32 @test(%struct.foo* %X) nounwind { %tmp1 = getelementptr %struct.foo* %X, i32 0, i32 2, i32 100 ; <i8*> [#uses=1] %tmp = load i8* %tmp1 ; <i8> [#uses=1] %tmp2 = zext i8 %tmp to i32 ; <i32> [#uses=1] diff --git a/llvm/test/CodeGen/PowerPC/rotl-2.ll b/llvm/test/CodeGen/PowerPC/rotl-2.ll index 1e6adb741a7..ce7a24c0b07 100644 --- a/llvm/test/CodeGen/PowerPC/rotl-2.ll +++ b/llvm/test/CodeGen/PowerPC/rotl-2.ll @@ -2,7 +2,7 @@ ; RUN: llvm-as < %s | llc -march=ppc32 | grep rlwnm | count 2 ; RUN: llvm-as < %s | llc -march=ppc32 | not grep or -define i32 @rotl32(i32 %A, i8 %Amt) { +define i32 @rotl32(i32 %A, i8 %Amt) nounwind { %shift.upgrd.1 = zext i8 %Amt to i32 ; <i32> [#uses=1] %B = shl i32 %A, %shift.upgrd.1 ; <i32> [#uses=1] %Amt2 = sub i8 32, %Amt ; <i8> [#uses=1] @@ -12,7 +12,7 @@ define i32 @rotl32(i32 %A, i8 %Amt) { ret i32 %D } -define i32 @rotr32(i32 %A, i8 %Amt) { +define i32 @rotr32(i32 %A, i8 %Amt) nounwind { %shift.upgrd.3 = zext i8 %Amt to i32 ; <i32> [#uses=1] %B = lshr i32 %A, %shift.upgrd.3 ; <i32> [#uses=1] %Amt2 = sub i8 32, %Amt ; <i8> [#uses=1] @@ -22,14 +22,14 @@ define i32 @rotr32(i32 %A, i8 %Amt) { ret i32 %D } -define i32 @rotli32(i32 %A) { +define i32 @rotli32(i32 %A) nounwind { %B = shl i32 %A, 5 ; <i32> [#uses=1] %C = lshr i32 %A, 27 ; <i32> [#uses=1] %D = or i32 %B, %C ; <i32> [#uses=1] ret i32 %D } -define i32 @rotri32(i32 %A) { +define i32 @rotri32(i32 %A) nounwind { %B = lshr i32 %A, 5 ; <i32> [#uses=1] %C = shl i32 %A, 27 ; <i32> [#uses=1] %D = or i32 %B, %C ; <i32> [#uses=1] |
