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authorKit Barton <kbarton@ca.ibm.com>2015-03-10 19:49:38 +0000
committerKit Barton <kbarton@ca.ibm.com>2015-03-10 19:49:38 +0000
commit20d3981e15b283eb008f605a5d93521ee8b5598a (patch)
tree444d02c94608d4546ff8678e05d92912f94425cf /llvm/test/CodeGen/PowerPC/vec_mul.ll
parent0fdb437b251d5aa485baaf79a9f04225d32190d1 (diff)
downloadbcm5719-llvm-20d3981e15b283eb008f605a5d93521ee8b5598a.tar.gz
bcm5719-llvm-20d3981e15b283eb008f605a5d93521ee8b5598a.zip
Change the generation of the vmuluwm instruction to be based on the MUL opcode.
Phabricator review: http://reviews.llvm.org/D8185 llvm-svn: 231827
Diffstat (limited to 'llvm/test/CodeGen/PowerPC/vec_mul.ll')
-rw-r--r--llvm/test/CodeGen/PowerPC/vec_mul.ll6
1 files changed, 3 insertions, 3 deletions
diff --git a/llvm/test/CodeGen/PowerPC/vec_mul.ll b/llvm/test/CodeGen/PowerPC/vec_mul.ll
index e815725f9c9..e1c9217ff13 100644
--- a/llvm/test/CodeGen/PowerPC/vec_mul.ll
+++ b/llvm/test/CodeGen/PowerPC/vec_mul.ll
@@ -1,8 +1,8 @@
-; RUN: llc < %s -mtriple=powerpc-unknown-linux-gnu -march=ppc32 -mattr=+altivec -mattr=-vsx | FileCheck %s
+; RUN: llc < %s -mtriple=powerpc-unknown-linux-gnu -march=ppc32 -mattr=+altivec -mattr=-vsx -mattr=-power8-altivec | FileCheck %s
; RUN: llc < %s -mtriple=powerpc64-unknown-linux-gnu -march=ppc64 -mattr=+altivec -mattr=-vsx -mcpu=pwr7 | FileCheck %s
-; RUN: llc < %s -mtriple=powerpc64le-unknown-linux-gnu -march=ppc64 -mattr=+altivec -mattr=-vsx -mcpu=pwr8 | FileCheck %s -check-prefix=CHECK-LE
+; RUN: llc < %s -mtriple=powerpc64le-unknown-linux-gnu -march=ppc64 -mattr=+altivec -mattr=-vsx -mcpu=pwr8 -mattr=-power8-altivec | FileCheck %s -check-prefix=CHECK-LE
; RUN: llc < %s -mtriple=powerpc64-unknown-linux-gnu -march=ppc64 -mattr=+altivec -mattr=+vsx -mcpu=pwr7 | FileCheck %s -check-prefix=CHECK-VSX
-; RUN: llc < %s -mtriple=powerpc64le-unknown-linux-gnu -march=ppc64 -mattr=+altivec -mattr=+vsx -mcpu=pwr8 | FileCheck %s -check-prefix=CHECK-LE-VSX
+; RUN: llc < %s -mtriple=powerpc64le-unknown-linux-gnu -march=ppc64 -mattr=+altivec -mattr=+vsx -mcpu=pwr8 -mattr=-power8-altivec | FileCheck %s -check-prefix=CHECK-LE-VSX
define <4 x i32> @test_v4i32(<4 x i32>* %X, <4 x i32>* %Y) {
%tmp = load <4 x i32>, <4 x i32>* %X ; <<4 x i32>> [#uses=1]
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