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authorNemanja Ivanovic <nemanja.i.ibm@gmail.com>2017-06-14 07:05:42 +0000
committerNemanja Ivanovic <nemanja.i.ibm@gmail.com>2017-06-14 07:05:42 +0000
commit7855185bbb3461bd83567ff73664cafbfdca6345 (patch)
tree040ef917b908f7ce9afa63d4b0458b8724e68743 /llvm/test/CodeGen/PowerPC/testComparesllnesll.ll
parent0085dce221b820f4287b6a2bbf428500501ece39 (diff)
downloadbcm5719-llvm-7855185bbb3461bd83567ff73664cafbfdca6345.tar.gz
bcm5719-llvm-7855185bbb3461bd83567ff73664cafbfdca6345.zip
Revert r304907 as it is causing some failures that I cannot reproduce.
Reverting this until a test case can be provided to aid the investigation. llvm-svn: 305372
Diffstat (limited to 'llvm/test/CodeGen/PowerPC/testComparesllnesll.ll')
-rw-r--r--llvm/test/CodeGen/PowerPC/testComparesllnesll.ll125
1 files changed, 0 insertions, 125 deletions
diff --git a/llvm/test/CodeGen/PowerPC/testComparesllnesll.ll b/llvm/test/CodeGen/PowerPC/testComparesllnesll.ll
deleted file mode 100644
index d87ff55739f..00000000000
--- a/llvm/test/CodeGen/PowerPC/testComparesllnesll.ll
+++ /dev/null
@@ -1,125 +0,0 @@
-; RUN: llc -verify-machineinstrs -mtriple=powerpc64-unknown-linux-gnu -O2 \
-; RUN: -ppc-asm-full-reg-names -mcpu=pwr8 < %s | FileCheck %s \
-; RUN: --implicit-check-not cmpw --implicit-check-not cmpd --implicit-check-not cmpl
-; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-linux-gnu -O2 \
-; RUN: -ppc-asm-full-reg-names -mcpu=pwr8 < %s | FileCheck %s \
-; RUN: --implicit-check-not cmpw --implicit-check-not cmpd --implicit-check-not cmpl
-; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-
-@glob = common local_unnamed_addr global i64 0, align 8
-
-define i64 @test_llnesll(i64 %a, i64 %b) {
-; CHECK-LABEL: test_llnesll:
-; CHECK: # BB#0: # %entry
-; CHECK-NEXT: xor r3, r3, r4
-; CHECK-NEXT: addic r4, r3, -1
-; CHECK-NEXT: subfe r3, r4, r3
-; CHECK-NEXT: blr
-entry:
- %cmp = icmp ne i64 %a, %b
- %conv1 = zext i1 %cmp to i64
- ret i64 %conv1
-}
-
-define i64 @test_llnesll_sext(i64 %a, i64 %b) {
-; CHECK-LABEL: test_llnesll_sext:
-; CHECK: # BB#0: # %entry
-; CHECK-NEXT: xor r3, r3, r4
-; CHECK-NEXT: subfic r3, r3, 0
-; CHECK-NEXT: subfe r3, r3, r3
-; CHECK-NEXT: blr
-entry:
- %cmp = icmp ne i64 %a, %b
- %conv1 = sext i1 %cmp to i64
- ret i64 %conv1
-}
-
-define i64 @test_llnesll_z(i64 %a) {
-; CHECK-LABEL: test_llnesll_z:
-; CHECK: # BB#0: # %entry
-; CHECK-NEXT: addic r4, r3, -1
-; CHECK-NEXT: subfe r3, r4, r3
-; CHECK-NEXT: blr
-entry:
- %cmp = icmp ne i64 %a, 0
- %conv1 = zext i1 %cmp to i64
- ret i64 %conv1
-}
-
-define i64 @test_llnesll_sext_z(i64 %a) {
-; CHECK-LABEL: test_llnesll_sext_z:
-; CHECK: # BB#0: # %entry
-; CHECK-NEXT: subfic r3, r3, 0
-; CHECK-NEXT: subfe r3, r3, r3
-; CHECK-NEXT: blr
-entry:
- %cmp = icmp ne i64 %a, 0
- %conv1 = sext i1 %cmp to i64
- ret i64 %conv1
-}
-
-define void @test_llnesll_store(i64 %a, i64 %b) {
-; CHECK-LABEL: test_llnesll_store:
-; CHECK: # BB#0: # %entry
-; CHECK-NEXT: addis r5, r2, .LC0@toc@ha
-; CHECK-NEXT: xor r3, r3, r4
-; CHECK-NEXT: ld r12, .LC0@toc@l(r5)
-; CHECK-NEXT: addic r5, r3, -1
-; CHECK-NEXT: subfe r3, r5, r3
-; CHECK-NEXT: std r3, 0(r12)
-; CHECK-NEXT: blr
-entry:
- %cmp = icmp ne i64 %a, %b
- %conv1 = zext i1 %cmp to i64
- store i64 %conv1, i64* @glob, align 8
- ret void
-}
-
-define void @test_llnesll_sext_store(i64 %a, i64 %b) {
-; CHECK-LABEL: test_llnesll_sext_store:
-; CHECK: # BB#0: # %entry
-; CHECK-NEXT: addis r5, r2, .LC0@toc@ha
-; CHECK-NEXT: xor r3, r3, r4
-; CHECK-NEXT: ld r12, .LC0@toc@l(r5)
-; CHECK-NEXT: subfic r3, r3, 0
-; CHECK-NEXT: subfe r3, r3, r3
-; CHECK-NEXT: std r3, 0(r12)
-; CHECK-NEXT: blr
-entry:
- %cmp = icmp ne i64 %a, %b
- %conv1 = sext i1 %cmp to i64
- store i64 %conv1, i64* @glob, align 8
- ret void
-}
-
-define void @test_llnesll_z_store(i64 %a) {
-; CHECK-LABEL: test_llnesll_z_store:
-; CHECK: # BB#0: # %entry
-; CHECK-NEXT: addis r4, r2, .LC0@toc@ha
-; CHECK-NEXT: addic r5, r3, -1
-; CHECK-NEXT: ld r4, .LC0@toc@l(r4)
-; CHECK-NEXT: subfe r3, r5, r3
-; CHECK-NEXT: std r3, 0(r4)
-; CHECK-NEXT: blr
-entry:
- %cmp = icmp ne i64 %a, 0
- %conv1 = zext i1 %cmp to i64
- store i64 %conv1, i64* @glob, align 8
- ret void
-}
-
-define void @test_llnesll_sext_z_store(i64 %a) {
-; CHECK-LABEL: test_llnesll_sext_z_store:
-; CHECK: # BB#0: # %entry
-; CHECK-NEXT: addis r4, r2, .LC0@toc@ha
-; CHECK-NEXT: subfic r3, r3, 0
-; CHECK-NEXT: ld r4, .LC0@toc@l(r4)
-; CHECK-NEXT: subfe r3, r3, r3
-; CHECK-NEXT: std r3, 0(r4)
-; CHECK-NEXT: blr
-entry:
- %cmp = icmp ne i64 %a, 0
- %conv1 = sext i1 %cmp to i64
- store i64 %conv1, i64* @glob, align 8
- ret void
-}
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