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authorFrancis Visoiu Mistrih <francisvm@yahoo.com>2017-12-04 17:18:51 +0000
committerFrancis Visoiu Mistrih <francisvm@yahoo.com>2017-12-04 17:18:51 +0000
commit25528d6de70e98683722e28655d8568d5f09b5c7 (patch)
tree061a9b3bfa623e3f38efd5fc02c6ec234acfcfde /llvm/test/CodeGen/PowerPC/testComparesllltui.ll
parent2b4385846c86078e0012e7bfb2e8dc6476ae8dd0 (diff)
downloadbcm5719-llvm-25528d6de70e98683722e28655d8568d5f09b5c7.tar.gz
bcm5719-llvm-25528d6de70e98683722e28655d8568d5f09b5c7.zip
[CodeGen] Unify MBB reference format in both MIR and debug output
As part of the unification of the debug format and the MIR format, print MBB references as '%bb.5'. The MIR printer prints the IR name of a MBB only for block definitions. * find . \( -name "*.mir" -o -name "*.cpp" -o -name "*.h" -o -name "*.ll" \) -type f -print0 | xargs -0 sed -i '' -E 's/BB#" << ([a-zA-Z0-9_]+)->getNumber\(\)/" << printMBBReference(*\1)/g' * find . \( -name "*.mir" -o -name "*.cpp" -o -name "*.h" -o -name "*.ll" \) -type f -print0 | xargs -0 sed -i '' -E 's/BB#" << ([a-zA-Z0-9_]+)\.getNumber\(\)/" << printMBBReference(\1)/g' * find . \( -name "*.txt" -o -name "*.s" -o -name "*.mir" -o -name "*.cpp" -o -name "*.h" -o -name "*.ll" \) -type f -print0 | xargs -0 sed -i '' -E 's/BB#([0-9]+)/%bb.\1/g' * grep -nr 'BB#' and fix Differential Revision: https://reviews.llvm.org/D40422 llvm-svn: 319665
Diffstat (limited to 'llvm/test/CodeGen/PowerPC/testComparesllltui.ll')
-rw-r--r--llvm/test/CodeGen/PowerPC/testComparesllltui.ll16
1 files changed, 8 insertions, 8 deletions
diff --git a/llvm/test/CodeGen/PowerPC/testComparesllltui.ll b/llvm/test/CodeGen/PowerPC/testComparesllltui.ll
index bea180168da..e785942b3c9 100644
--- a/llvm/test/CodeGen/PowerPC/testComparesllltui.ll
+++ b/llvm/test/CodeGen/PowerPC/testComparesllltui.ll
@@ -10,7 +10,7 @@
; Function Attrs: norecurse nounwind readnone
define i64 @test_llltui(i32 zeroext %a, i32 zeroext %b) {
; CHECK-LABEL: test_llltui:
-; CHECK: # BB#0: # %entry
+; CHECK: # %bb.0: # %entry
; CHECK-NOT: clrldi
; CHECK-NEXT: sub [[REG:r[0-9]+]], r3, r4
; CHECK-NEXT: rldicl r3, [[REG]], 1, 63
@@ -24,7 +24,7 @@ entry:
; Function Attrs: norecurse nounwind readnone
define i64 @test_llltui_sext(i32 zeroext %a, i32 zeroext %b) {
; CHECK-LABEL: test_llltui_sext:
-; CHECK: # BB#0: # %entry
+; CHECK: # %bb.0: # %entry
; CHECK-NEXT: sub [[REG:r[0-9]+]], r3, r4
; CHECK-NEXT: sradi r3, [[REG]], 63
; CHECK-NEXT: blr
@@ -37,7 +37,7 @@ entry:
; Function Attrs: norecurse nounwind readnone
define i64 @test_llltui_z(i32 zeroext %a) {
; CHECK-LABEL: test_llltui_z:
-; CHECK: # BB#0: # %entry
+; CHECK: # %bb.0: # %entry
; CHECK-NEXT: li r3, 0
; CHECK-NEXT: blr
entry:
@@ -47,7 +47,7 @@ entry:
; Function Attrs: norecurse nounwind readnone
define i64 @test_llltui_sext_z(i32 zeroext %a) {
; CHECK-LABEL: test_llltui_sext_z:
-; CHECK: # BB#0: # %entry
+; CHECK: # %bb.0: # %entry
; CHECK-NEXT: li r3, 0
; CHECK-NEXT: blr
entry:
@@ -57,7 +57,7 @@ entry:
; Function Attrs: norecurse nounwind
define void @test_llltui_store(i32 zeroext %a, i32 zeroext %b) {
; CHECK-LABEL: test_llltui_store:
-; CHECK: # BB#0: # %entry
+; CHECK: # %bb.0: # %entry
; CHECK-NOT: clrldi
; CHECK: sub [[REG:r[2-9]+]], r3, r4
; CHECK: rldicl {{r[0-9]+}}, [[REG]], 1, 63
@@ -71,7 +71,7 @@ entry:
; Function Attrs: norecurse nounwind
define void @test_llltui_sext_store(i32 zeroext %a, i32 zeroext %b) {
; CHECK-LABEL: test_llltui_sext_store:
-; CHECK: # BB#0: # %entry
+; CHECK: # %bb.0: # %entry
; CHECK-NOT: clrldi
; CHECK: sub [[REG:r[0-9]+]], r3, r4
; CHECK: sradi {{r[0-9]+}}, [[REG]], 63
@@ -85,7 +85,7 @@ entry:
; Function Attrs: norecurse nounwind
define void @test_llltui_z_store(i32 zeroext %a) {
; CHECK-LABEL: test_llltui_z_store:
-; CHECK: # BB#0: # %entry
+; CHECK: # %bb.0: # %entry
; CHECK: li [[REG:r[0-9]+]], 0
; CHECK: stw [[REG]], 0(r3)
; CHECK-NEXT: blr
@@ -97,7 +97,7 @@ entry:
; Function Attrs: norecurse nounwind
define void @test_llltui_sext_z_store(i32 zeroext %a) {
; CHECK-LABEL: test_llltui_sext_z_store:
-; CHECK: # BB#0: # %entry
+; CHECK: # %bb.0: # %entry
; CHECK: li [[REG:r[0-9]+]], 0
; CHECK: stw [[REG]], 0(r3)
; CHECK-NEXT: blr
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