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| author | Stefan Pintilie <stefanp@ca.ibm.com> | 2018-07-04 18:54:25 +0000 |
|---|---|---|
| committer | Stefan Pintilie <stefanp@ca.ibm.com> | 2018-07-04 18:54:25 +0000 |
| commit | cb4f0c5c07af1ce096c1609bd6576a0aee57700a (patch) | |
| tree | 5123514d4ab99e117e3c0103b558b31551332f7f /llvm/test/CodeGen/PowerPC/testCompareslllesc.ll | |
| parent | bea19a9493b7286a0c79a8be2b788bed8cb4cfa9 (diff) | |
| download | bcm5719-llvm-cb4f0c5c07af1ce096c1609bd6576a0aee57700a.tar.gz bcm5719-llvm-cb4f0c5c07af1ce096c1609bd6576a0aee57700a.zip | |
[PowerPC] Replace the Post RA List Scheduler with the Machine Scheduler
We want to run the Machine Scheduler instead of the List Scheduler after RA.
Checked with a performance run on a Power 9 machine with SPEC 2006 and while
some benchmarks improved and others degraded the geomean was slightly improved
with the Machine Scheduler.
Differential Revision: https://reviews.llvm.org/D45265
llvm-svn: 336295
Diffstat (limited to 'llvm/test/CodeGen/PowerPC/testCompareslllesc.ll')
| -rw-r--r-- | llvm/test/CodeGen/PowerPC/testCompareslllesc.ll | 10 |
1 files changed, 5 insertions, 5 deletions
diff --git a/llvm/test/CodeGen/PowerPC/testCompareslllesc.ll b/llvm/test/CodeGen/PowerPC/testCompareslllesc.ll index f9352990f2c..575451ec7fd 100644 --- a/llvm/test/CodeGen/PowerPC/testCompareslllesc.ll +++ b/llvm/test/CodeGen/PowerPC/testCompareslllesc.ll @@ -1,10 +1,10 @@ +; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py ; RUN: llc -verify-machineinstrs -mtriple=powerpc64-unknown-linux-gnu -O2 \ ; RUN: -ppc-gpr-icmps=all -ppc-asm-full-reg-names -mcpu=pwr8 < %s | FileCheck %s \ ; RUN: --implicit-check-not cmpw --implicit-check-not cmpd --implicit-check-not cmpl ; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-linux-gnu -O2 \ ; RUN: -ppc-gpr-icmps=all -ppc-asm-full-reg-names -mcpu=pwr8 < %s | FileCheck %s \ ; RUN: --implicit-check-not cmpw --implicit-check-not cmpd --implicit-check-not cmpl -; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py @glob = common local_unnamed_addr global i8 0, align 1 @@ -39,10 +39,10 @@ define void @test_lllesc_store(i8 signext %a, i8 signext %b) { ; CHECK: # %bb.0: # %entry ; CHECK-NEXT: addis r5, r2, .LC0@toc@ha ; CHECK-NEXT: sub r3, r4, r3 -; CHECK-NEXT: ld r12, .LC0@toc@l(r5) +; CHECK-NEXT: ld r4, .LC0@toc@l(r5) ; CHECK-NEXT: rldicl r3, r3, 1, 63 ; CHECK-NEXT: xori r3, r3, 1 -; CHECK-NEXT: stb r3, 0(r12) +; CHECK-NEXT: stb r3, 0(r4) ; CHECK-NEXT: blr entry: %cmp = icmp sle i8 %a, %b @@ -56,10 +56,10 @@ define void @test_lllesc_sext_store(i8 signext %a, i8 signext %b) { ; CHECK: # %bb.0: # %entry ; CHECK-NEXT: addis r5, r2, .LC0@toc@ha ; CHECK-NEXT: sub r3, r4, r3 -; CHECK-NEXT: ld r12, .LC0@toc@l(r5) +; CHECK-NEXT: ld r4, .LC0@toc@l(r5) ; CHECK-NEXT: rldicl r3, r3, 1, 63 ; CHECK-NEXT: addi r3, r3, -1 -; CHECK-NEXT: stb r3, 0(r12) +; CHECK-NEXT: stb r3, 0(r4) ; CHECK-NEXT: blr entry: %cmp = icmp sle i8 %a, %b |
