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| author | Stefan Pintilie <stefanp@ca.ibm.com> | 2018-07-04 18:54:25 +0000 |
|---|---|---|
| committer | Stefan Pintilie <stefanp@ca.ibm.com> | 2018-07-04 18:54:25 +0000 |
| commit | cb4f0c5c07af1ce096c1609bd6576a0aee57700a (patch) | |
| tree | 5123514d4ab99e117e3c0103b558b31551332f7f /llvm/test/CodeGen/PowerPC/testComparesllequll.ll | |
| parent | bea19a9493b7286a0c79a8be2b788bed8cb4cfa9 (diff) | |
| download | bcm5719-llvm-cb4f0c5c07af1ce096c1609bd6576a0aee57700a.tar.gz bcm5719-llvm-cb4f0c5c07af1ce096c1609bd6576a0aee57700a.zip | |
[PowerPC] Replace the Post RA List Scheduler with the Machine Scheduler
We want to run the Machine Scheduler instead of the List Scheduler after RA.
Checked with a performance run on a Power 9 machine with SPEC 2006 and while
some benchmarks improved and others degraded the geomean was slightly improved
with the Machine Scheduler.
Differential Revision: https://reviews.llvm.org/D45265
llvm-svn: 336295
Diffstat (limited to 'llvm/test/CodeGen/PowerPC/testComparesllequll.ll')
| -rw-r--r-- | llvm/test/CodeGen/PowerPC/testComparesllequll.ll | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/llvm/test/CodeGen/PowerPC/testComparesllequll.ll b/llvm/test/CodeGen/PowerPC/testComparesllequll.ll index 7d1fe527e8a..01136f13a4e 100644 --- a/llvm/test/CodeGen/PowerPC/testComparesllequll.ll +++ b/llvm/test/CodeGen/PowerPC/testComparesllequll.ll @@ -68,10 +68,10 @@ define void @test_llequll_store(i64 %a, i64 %b) { ; CHECK: # %bb.0: # %entry ; CHECK-NEXT: addis r5, r2, .LC0@toc@ha ; CHECK-NEXT: xor r3, r3, r4 -; CHECK-NEXT: ld r12, .LC0@toc@l(r5) +; CHECK-NEXT: ld r4, .LC0@toc@l(r5) ; CHECK-NEXT: cntlzd r3, r3 ; CHECK-NEXT: rldicl r3, r3, 58, 63 -; CHECK-NEXT: std r3, 0(r12) +; CHECK-NEXT: std r3, 0(r4) ; CHECK-NEXT: blr entry: %cmp = icmp eq i64 %a, %b @@ -86,10 +86,10 @@ define void @test_llequll_sext_store(i64 %a, i64 %b) { ; CHECK: # %bb.0: # %entry ; CHECK-NEXT: addis r5, r2, .LC0@toc@ha ; CHECK-NEXT: xor r3, r3, r4 -; CHECK-NEXT: ld r12, .LC0@toc@l(r5) +; CHECK-NEXT: ld r4, .LC0@toc@l(r5) ; CHECK-NEXT: addic r3, r3, -1 ; CHECK-NEXT: subfe r3, r3, r3 -; CHECK-NEXT: std r3, 0(r12) +; CHECK-NEXT: std r3, 0(r4) ; CHECK-NEXT: blr entry: %cmp = icmp eq i64 %a, %b |
