[PowerPC] Make no-PIC default to match GCC - LLVM

Change the default for PowerPC LE to -fno-PIC.

Differential Revision: https://reviews.llvm.org/D53383

llvm-svn: 348298

1 files changed, 134 insertions, 14 deletions

diff --git a/llvm/test/CodeGen/PowerPC/testComparesllequi.ll b/llvm/test/CodeGen/PowerPC/testComparesllequi.ll
index cb7be180ee6..fd1d13bae7f 100644
--- a/llvm/test/CodeGen/PowerPC/testComparesllequi.ll
+++ b/llvm/test/CodeGen/PowerPC/testComparesllequi.ll
@@ -1,9 +1,9 @@
 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
 ; RUN: llc -verify-machineinstrs -mtriple=powerpc64-unknown-linux-gnu -O2 \
-; RUN:   -ppc-gpr-icmps=all -ppc-asm-full-reg-names -mcpu=pwr8 < %s | FileCheck %s \
+; RUN:   -ppc-gpr-icmps=all -ppc-asm-full-reg-names -mcpu=pwr8 < %s | FileCheck %s --check-prefix=CHECK-BE \
 ; RUN:  --implicit-check-not cmpw --implicit-check-not cmpd --implicit-check-not cmpl
 ; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-linux-gnu -O2 \
-; RUN:   -ppc-gpr-icmps=all -ppc-asm-full-reg-names -mcpu=pwr8 < %s | FileCheck %s \
+; RUN:   -ppc-gpr-icmps=all -ppc-asm-full-reg-names -mcpu=pwr8 < %s | FileCheck %s --check-prefix=CHECK-LE \
 ; RUN:  --implicit-check-not cmpw --implicit-check-not cmpd --implicit-check-not cmpl
 
 @glob = common local_unnamed_addr global i32 0, align 4
@@ -16,6 +16,19 @@ define i64 @test_llequi(i32 zeroext %a, i32 zeroext %b) {
 ; CHECK-NEXT:    cntlzw r3, r3
 ; CHECK-NEXT:    srwi r3, r3, 5
 ; CHECK-NEXT:    blr
+; CHECK-BE-LABEL: test_llequi:
+; CHECK-BE:       # %bb.0: # %entry
+; CHECK-BE-NEXT:    xor r3, r3, r4
+; CHECK-BE-NEXT:    cntlzw r3, r3
+; CHECK-BE-NEXT:    srwi r3, r3, 5
+; CHECK-BE-NEXT:    blr
+;
+; CHECK-LE-LABEL: test_llequi:
+; CHECK-LE:       # %bb.0: # %entry
+; CHECK-LE-NEXT:    xor r3, r3, r4
+; CHECK-LE-NEXT:    cntlzw r3, r3
+; CHECK-LE-NEXT:    srwi r3, r3, 5
+; CHECK-LE-NEXT:    blr
 entry:
   %cmp = icmp eq i32 %a, %b
   %conv1 = zext i1 %cmp to i64
@@ -31,6 +44,21 @@ define i64 @test_llequi_sext(i32 zeroext %a, i32 zeroext %b) {
 ; CHECK-NEXT:    srwi r3, r3, 5
 ; CHECK-NEXT:    neg r3, r3
 ; CHECK-NEXT:    blr
+; CHECK-BE-LABEL: test_llequi_sext:
+; CHECK-BE:       # %bb.0: # %entry
+; CHECK-BE-NEXT:    xor r3, r3, r4
+; CHECK-BE-NEXT:    cntlzw r3, r3
+; CHECK-BE-NEXT:    srwi r3, r3, 5
+; CHECK-BE-NEXT:    neg r3, r3
+; CHECK-BE-NEXT:    blr
+;
+; CHECK-LE-LABEL: test_llequi_sext:
+; CHECK-LE:       # %bb.0: # %entry
+; CHECK-LE-NEXT:    xor r3, r3, r4
+; CHECK-LE-NEXT:    cntlzw r3, r3
+; CHECK-LE-NEXT:    srwi r3, r3, 5
+; CHECK-LE-NEXT:    neg r3, r3
+; CHECK-LE-NEXT:    blr
 entry:
   %cmp = icmp eq i32 %a, %b
   %conv1 = sext i1 %cmp to i64
@@ -44,6 +72,17 @@ define i64 @test_llequi_z(i32 zeroext %a) {
 ; CHECK-NEXT:    cntlzw r3, r3
 ; CHECK-NEXT:    srwi r3, r3, 5
 ; CHECK-NEXT:    blr
+; CHECK-BE-LABEL: test_llequi_z:
+; CHECK-BE:       # %bb.0: # %entry
+; CHECK-BE-NEXT:    cntlzw r3, r3
+; CHECK-BE-NEXT:    srwi r3, r3, 5
+; CHECK-BE-NEXT:    blr
+;
+; CHECK-LE-LABEL: test_llequi_z:
+; CHECK-LE:       # %bb.0: # %entry
+; CHECK-LE-NEXT:    cntlzw r3, r3
+; CHECK-LE-NEXT:    srwi r3, r3, 5
+; CHECK-LE-NEXT:    blr
 entry:
   %cmp = icmp eq i32 %a, 0
   %conv1 = zext i1 %cmp to i64
@@ -58,6 +97,19 @@ define i64 @test_llequi_sext_z(i32 zeroext %a) {
 ; CHECK-NEXT:    srwi r3, r3, 5
 ; CHECK-NEXT:    neg r3, r3
 ; CHECK-NEXT:    blr
+; CHECK-BE-LABEL: test_llequi_sext_z:
+; CHECK-BE:       # %bb.0: # %entry
+; CHECK-BE-NEXT:    cntlzw r3, r3
+; CHECK-BE-NEXT:    srwi r3, r3, 5
+; CHECK-BE-NEXT:    neg r3, r3
+; CHECK-BE-NEXT:    blr
+;
+; CHECK-LE-LABEL: test_llequi_sext_z:
+; CHECK-LE:       # %bb.0: # %entry
+; CHECK-LE-NEXT:    cntlzw r3, r3
+; CHECK-LE-NEXT:    srwi r3, r3, 5
+; CHECK-LE-NEXT:    neg r3, r3
+; CHECK-LE-NEXT:    blr
 entry:
   %cmp = icmp eq i32 %a, 0
   %conv1 = sext i1 %cmp to i64
@@ -68,13 +120,30 @@ entry:
 define void @test_llequi_store(i32 zeroext %a, i32 zeroext %b) {
 ; CHECK-LABEL: test_llequi_store:
 ; CHECK:       # %bb.0: # %entry
-; CHECK-NEXT:    addis r5, r2, .LC0@toc@ha
 ; CHECK-NEXT:    xor r3, r3, r4
-; CHECK-NEXT:    ld r4, .LC0@toc@l(r5)
+; CHECK-NEXT:    addis r5, r2, glob@toc@ha
 ; CHECK-NEXT:    cntlzw r3, r3
 ; CHECK-NEXT:    srwi r3, r3, 5
-; CHECK-NEXT:    stw r3, 0(r4)
+; CHECK-NEXT:    stw r3, glob@toc@l(r5)
 ; CHECK-NEXT:    blr
+; CHECK-BE-LABEL: test_llequi_store:
+; CHECK-BE:       # %bb.0: # %entry
+; CHECK-BE-NEXT:    addis r5, r2, .LC0@toc@ha
+; CHECK-BE-NEXT:    xor r3, r3, r4
+; CHECK-BE-NEXT:    ld r4, .LC0@toc@l(r5)
+; CHECK-BE-NEXT:    cntlzw r3, r3
+; CHECK-BE-NEXT:    srwi r3, r3, 5
+; CHECK-BE-NEXT:    stw r3, 0(r4)
+; CHECK-BE-NEXT:    blr
+;
+; CHECK-LE-LABEL: test_llequi_store:
+; CHECK-LE:       # %bb.0: # %entry
+; CHECK-LE-NEXT:    xor r3, r3, r4
+; CHECK-LE-NEXT:    addis r5, r2, glob@toc@ha
+; CHECK-LE-NEXT:    cntlzw r3, r3
+; CHECK-LE-NEXT:    srwi r3, r3, 5
+; CHECK-LE-NEXT:    stw r3, glob@toc@l(r5)
+; CHECK-LE-NEXT:    blr
 entry:
   %cmp = icmp eq i32 %a, %b
   %conv = zext i1 %cmp to i32
@@ -86,14 +155,33 @@ entry:
 define void @test_llequi_sext_store(i32 zeroext %a, i32 zeroext %b) {
 ; CHECK-LABEL: test_llequi_sext_store:
 ; CHECK:       # %bb.0: # %entry
-; CHECK-NEXT:    addis r5, r2, .LC0@toc@ha
 ; CHECK-NEXT:    xor r3, r3, r4
+; CHECK-NEXT:    addis r5, r2, glob@toc@ha
 ; CHECK-NEXT:    cntlzw r3, r3
-; CHECK-NEXT:    ld r4, .LC0@toc@l(r5)
 ; CHECK-NEXT:    srwi r3, r3, 5
 ; CHECK-NEXT:    neg r3, r3
-; CHECK-NEXT:    stw r3, 0(r4)
+; CHECK-NEXT:    stw r3, glob@toc@l(r5)
 ; CHECK-NEXT:    blr
+; CHECK-BE-LABEL: test_llequi_sext_store:
+; CHECK-BE:       # %bb.0: # %entry
+; CHECK-BE-NEXT:    addis r5, r2, .LC0@toc@ha
+; CHECK-BE-NEXT:    xor r3, r3, r4
+; CHECK-BE-NEXT:    cntlzw r3, r3
+; CHECK-BE-NEXT:    ld r4, .LC0@toc@l(r5)
+; CHECK-BE-NEXT:    srwi r3, r3, 5
+; CHECK-BE-NEXT:    neg r3, r3
+; CHECK-BE-NEXT:    stw r3, 0(r4)
+; CHECK-BE-NEXT:    blr
+;
+; CHECK-LE-LABEL: test_llequi_sext_store:
+; CHECK-LE:       # %bb.0: # %entry
+; CHECK-LE-NEXT:    xor r3, r3, r4
+; CHECK-LE-NEXT:    addis r5, r2, glob@toc@ha
+; CHECK-LE-NEXT:    cntlzw r3, r3
+; CHECK-LE-NEXT:    srwi r3, r3, 5
+; CHECK-LE-NEXT:    neg r3, r3
+; CHECK-LE-NEXT:    stw r3, glob@toc@l(r5)
+; CHECK-LE-NEXT:    blr
 entry:
   %cmp = icmp eq i32 %a, %b
   %sub = sext i1 %cmp to i32
@@ -105,12 +193,27 @@ entry:
 define void @test_llequi_z_store(i32 zeroext %a) {
 ; CHECK-LABEL: test_llequi_z_store:
 ; CHECK:       # %bb.0: # %entry
-; CHECK-NEXT:    addis r4, r2, .LC0@toc@ha
 ; CHECK-NEXT:    cntlzw r3, r3
-; CHECK-NEXT:    ld r4, .LC0@toc@l(r4)
+; CHECK-NEXT:    addis r4, r2, glob@toc@ha
 ; CHECK-NEXT:    srwi r3, r3, 5
-; CHECK-NEXT:    stw r3, 0(r4)
+; CHECK-NEXT:    stw r3, glob@toc@l(r4)
 ; CHECK-NEXT:    blr
+; CHECK-BE-LABEL: test_llequi_z_store:
+; CHECK-BE:       # %bb.0: # %entry
+; CHECK-BE-NEXT:    addis r4, r2, .LC0@toc@ha
+; CHECK-BE-NEXT:    cntlzw r3, r3
+; CHECK-BE-NEXT:    ld r4, .LC0@toc@l(r4)
+; CHECK-BE-NEXT:    srwi r3, r3, 5
+; CHECK-BE-NEXT:    stw r3, 0(r4)
+; CHECK-BE-NEXT:    blr
+;
+; CHECK-LE-LABEL: test_llequi_z_store:
+; CHECK-LE:       # %bb.0: # %entry
+; CHECK-LE-NEXT:    cntlzw r3, r3
+; CHECK-LE-NEXT:    addis r4, r2, glob@toc@ha
+; CHECK-LE-NEXT:    srwi r3, r3, 5
+; CHECK-LE-NEXT:    stw r3, glob@toc@l(r4)
+; CHECK-LE-NEXT:    blr
 entry:
   %cmp = icmp eq i32 %a, 0
   %conv = zext i1 %cmp to i32
@@ -122,13 +225,30 @@ entry:
 define void @test_llequi_sext_z_store(i32 zeroext %a) {
 ; CHECK-LABEL: test_llequi_sext_z_store:
 ; CHECK:       # %bb.0: # %entry
-; CHECK-NEXT:    addis r4, r2, .LC0@toc@ha
 ; CHECK-NEXT:    cntlzw r3, r3
-; CHECK-NEXT:    ld r4, .LC0@toc@l(r4)
+; CHECK-NEXT:    addis r4, r2, glob@toc@ha
 ; CHECK-NEXT:    srwi r3, r3, 5
 ; CHECK-NEXT:    neg r3, r3
-; CHECK-NEXT:    stw r3, 0(r4)
+; CHECK-NEXT:    stw r3, glob@toc@l(r4)
 ; CHECK-NEXT:    blr
+; CHECK-BE-LABEL: test_llequi_sext_z_store:
+; CHECK-BE:       # %bb.0: # %entry
+; CHECK-BE-NEXT:    addis r4, r2, .LC0@toc@ha
+; CHECK-BE-NEXT:    cntlzw r3, r3
+; CHECK-BE-NEXT:    ld r4, .LC0@toc@l(r4)
+; CHECK-BE-NEXT:    srwi r3, r3, 5
+; CHECK-BE-NEXT:    neg r3, r3
+; CHECK-BE-NEXT:    stw r3, 0(r4)
+; CHECK-BE-NEXT:    blr
+;
+; CHECK-LE-LABEL: test_llequi_sext_z_store:
+; CHECK-LE:       # %bb.0: # %entry
+; CHECK-LE-NEXT:    cntlzw r3, r3
+; CHECK-LE-NEXT:    addis r4, r2, glob@toc@ha
+; CHECK-LE-NEXT:    srwi r3, r3, 5
+; CHECK-LE-NEXT:    neg r3, r3
+; CHECK-LE-NEXT:    stw r3, glob@toc@l(r4)
+; CHECK-LE-NEXT:    blr
 entry:
   %cmp = icmp eq i32 %a, 0
   %sub = sext i1 %cmp to i32