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authorStefan Pintilie <stefanp@ca.ibm.com>2018-07-04 18:54:25 +0000
committerStefan Pintilie <stefanp@ca.ibm.com>2018-07-04 18:54:25 +0000
commitcb4f0c5c07af1ce096c1609bd6576a0aee57700a (patch)
tree5123514d4ab99e117e3c0103b558b31551332f7f /llvm/test/CodeGen/PowerPC/testComparesineus.ll
parentbea19a9493b7286a0c79a8be2b788bed8cb4cfa9 (diff)
downloadbcm5719-llvm-cb4f0c5c07af1ce096c1609bd6576a0aee57700a.tar.gz
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[PowerPC] Replace the Post RA List Scheduler with the Machine Scheduler
We want to run the Machine Scheduler instead of the List Scheduler after RA. Checked with a performance run on a Power 9 machine with SPEC 2006 and while some benchmarks improved and others degraded the geomean was slightly improved with the Machine Scheduler. Differential Revision: https://reviews.llvm.org/D45265 llvm-svn: 336295
Diffstat (limited to 'llvm/test/CodeGen/PowerPC/testComparesineus.ll')
-rw-r--r--llvm/test/CodeGen/PowerPC/testComparesineus.ll4
1 files changed, 2 insertions, 2 deletions
diff --git a/llvm/test/CodeGen/PowerPC/testComparesineus.ll b/llvm/test/CodeGen/PowerPC/testComparesineus.ll
index a78671b6407..9efd5d65df6 100644
--- a/llvm/test/CodeGen/PowerPC/testComparesineus.ll
+++ b/llvm/test/CodeGen/PowerPC/testComparesineus.ll
@@ -1,10 +1,10 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc -verify-machineinstrs -mtriple=powerpc64-unknown-linux-gnu -O2 \
; RUN: -ppc-gpr-icmps=all -ppc-asm-full-reg-names -mcpu=pwr8 < %s | FileCheck %s \
; RUN: --implicit-check-not cmpw --implicit-check-not cmpd --implicit-check-not cmpl
; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-linux-gnu -O2 \
; RUN: -ppc-gpr-icmps=all -ppc-asm-full-reg-names -mcpu=pwr8 < %s | FileCheck %s \
; RUN: --implicit-check-not cmpw --implicit-check-not cmpd --implicit-check-not cmpl
-; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
@glob = common local_unnamed_addr global i16 0, align 2
@@ -67,8 +67,8 @@ entry:
define void @test_ineus_store(i16 zeroext %a, i16 zeroext %b) {
; CHECK-LABEL: test_ineus_store:
; CHECK: # %bb.0: # %entry
-; CHECK-NEXT: xor r3, r3, r4
; CHECK-NEXT: addis r5, r2, .LC0@toc@ha
+; CHECK-NEXT: xor r3, r3, r4
; CHECK-NEXT: cntlzw r3, r3
; CHECK-NEXT: ld r4, .LC0@toc@l(r5)
; CHECK-NEXT: srwi r3, r3, 5
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