diff options
| author | Stefan Pintilie <stefanp@ca.ibm.com> | 2018-11-16 18:36:21 +0000 |
|---|---|---|
| committer | Stefan Pintilie <stefanp@ca.ibm.com> | 2018-11-16 18:36:21 +0000 |
| commit | 046eff502f3bf2c39f210c58d17e5fcf3c2f8229 (patch) | |
| tree | b2b451656b8d40d2195721ceeefc5946240e2016 /llvm/test/CodeGen/PowerPC/testComparesineus.ll | |
| parent | 534618d78e0a7210515380ae33b06f8b6eac5a51 (diff) | |
| download | bcm5719-llvm-046eff502f3bf2c39f210c58d17e5fcf3c2f8229.tar.gz bcm5719-llvm-046eff502f3bf2c39f210c58d17e5fcf3c2f8229.zip | |
[PowerPC] Make no-PIC default to match GCC - LLVM
Set -fno-PIC as the default option.
Differential Revision: https://reviews.llvm.org/D53383
llvm-svn: 347069
Diffstat (limited to 'llvm/test/CodeGen/PowerPC/testComparesineus.ll')
| -rw-r--r-- | llvm/test/CodeGen/PowerPC/testComparesineus.ll | 20 |
1 files changed, 8 insertions, 12 deletions
diff --git a/llvm/test/CodeGen/PowerPC/testComparesineus.ll b/llvm/test/CodeGen/PowerPC/testComparesineus.ll index 9efd5d65df6..7e6ee9f8e8c 100644 --- a/llvm/test/CodeGen/PowerPC/testComparesineus.ll +++ b/llvm/test/CodeGen/PowerPC/testComparesineus.ll @@ -67,13 +67,12 @@ entry: define void @test_ineus_store(i16 zeroext %a, i16 zeroext %b) { ; CHECK-LABEL: test_ineus_store: ; CHECK: # %bb.0: # %entry -; CHECK-NEXT: addis r5, r2, .LC0@toc@ha ; CHECK-NEXT: xor r3, r3, r4 +; CHECK-NEXT: addis r5, r2, glob@toc@ha ; CHECK-NEXT: cntlzw r3, r3 -; CHECK-NEXT: ld r4, .LC0@toc@l(r5) ; CHECK-NEXT: srwi r3, r3, 5 ; CHECK-NEXT: xori r3, r3, 1 -; CHECK-NEXT: sth r3, 0(r4) +; CHECK-NEXT: sth r3, glob@toc@l(r5) ; CHECK-NEXT: blr entry: %cmp = icmp ne i16 %a, %b @@ -86,13 +85,12 @@ define void @test_ineus_sext_store(i16 zeroext %a, i16 zeroext %b) { ; CHECK-LABEL: test_ineus_sext_store: ; CHECK: # %bb.0: # %entry ; CHECK-NEXT: xor r3, r3, r4 -; CHECK-NEXT: addis r5, r2, .LC0@toc@ha +; CHECK-NEXT: addis r5, r2, glob@toc@ha ; CHECK-NEXT: cntlzw r3, r3 -; CHECK-NEXT: ld r4, .LC0@toc@l(r5) ; CHECK-NEXT: srwi r3, r3, 5 ; CHECK-NEXT: xori r3, r3, 1 ; CHECK-NEXT: neg r3, r3 -; CHECK-NEXT: sth r3, 0(r4) +; CHECK-NEXT: sth r3, glob@toc@l(r5) ; CHECK-NEXT: blr entry: %cmp = icmp ne i16 %a, %b @@ -104,12 +102,11 @@ entry: define void @test_ineus_z_store(i16 zeroext %a) { ; CHECK-LABEL: test_ineus_z_store: ; CHECK: # %bb.0: # %entry -; CHECK-NEXT: addis r4, r2, .LC0@toc@ha ; CHECK-NEXT: cntlzw r3, r3 -; CHECK-NEXT: ld r4, .LC0@toc@l(r4) +; CHECK-NEXT: addis r4, r2, glob@toc@ha ; CHECK-NEXT: srwi r3, r3, 5 ; CHECK-NEXT: xori r3, r3, 1 -; CHECK-NEXT: sth r3, 0(r4) +; CHECK-NEXT: sth r3, glob@toc@l(r4) ; CHECK-NEXT: blr entry: %cmp = icmp ne i16 %a, 0 @@ -121,13 +118,12 @@ entry: define void @test_ineus_sext_z_store(i16 zeroext %a) { ; CHECK-LABEL: test_ineus_sext_z_store: ; CHECK: # %bb.0: # %entry -; CHECK-NEXT: addis r4, r2, .LC0@toc@ha ; CHECK-NEXT: cntlzw r3, r3 +; CHECK-NEXT: addis r4, r2, glob@toc@ha ; CHECK-NEXT: srwi r3, r3, 5 -; CHECK-NEXT: ld r4, .LC0@toc@l(r4) ; CHECK-NEXT: xori r3, r3, 1 ; CHECK-NEXT: neg r3, r3 -; CHECK-NEXT: sth r3, 0(r4) +; CHECK-NEXT: sth r3, glob@toc@l(r4) ; CHECK-NEXT: blr entry: %cmp = icmp ne i16 %a, 0 |

