[PowerPC] Make no-PIC default to match GCC - LLVM

Change the default for PowerPC LE to -fno-PIC.

Differential Revision: https://reviews.llvm.org/D53383

llvm-svn: 348298

1 files changed, 128 insertions, 16 deletions

diff --git a/llvm/test/CodeGen/PowerPC/testComparesinesll.ll b/llvm/test/CodeGen/PowerPC/testComparesinesll.ll
index 33416a06d02..bfc0b9d3fbb 100644
--- a/llvm/test/CodeGen/PowerPC/testComparesinesll.ll
+++ b/llvm/test/CodeGen/PowerPC/testComparesinesll.ll
@@ -1,9 +1,9 @@
 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
 ; RUN: llc -verify-machineinstrs -mtriple=powerpc64-unknown-linux-gnu -O2 \
-; RUN:   -ppc-gpr-icmps=all -ppc-asm-full-reg-names -mcpu=pwr8 < %s | FileCheck %s \
+; RUN:   -ppc-gpr-icmps=all -ppc-asm-full-reg-names -mcpu=pwr8 < %s | FileCheck %s --check-prefix=CHECK-BE \
 ; RUN:  --implicit-check-not cmpw --implicit-check-not cmpd --implicit-check-not cmpl
 ; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-linux-gnu -O2 \
-; RUN:   -ppc-gpr-icmps=all -ppc-asm-full-reg-names -mcpu=pwr8 < %s | FileCheck %s \
+; RUN:   -ppc-gpr-icmps=all -ppc-asm-full-reg-names -mcpu=pwr8 < %s | FileCheck %s --check-prefix=CHECK-LE \
 ; RUN:  --implicit-check-not cmpw --implicit-check-not cmpd --implicit-check-not cmpl
 
 @glob = common local_unnamed_addr global i64 0, align 8
@@ -15,6 +15,19 @@ define signext i32 @test_inesll(i64 %a, i64 %b) {
 ; CHECK-NEXT:    addic r4, r3, -1
 ; CHECK-NEXT:    subfe r3, r4, r3
 ; CHECK-NEXT:    blr
+; CHECK-BE-LABEL: test_inesll:
+; CHECK-BE:       # %bb.0: # %entry
+; CHECK-BE-NEXT:    xor r3, r3, r4
+; CHECK-BE-NEXT:    addic r4, r3, -1
+; CHECK-BE-NEXT:    subfe r3, r4, r3
+; CHECK-BE-NEXT:    blr
+;
+; CHECK-LE-LABEL: test_inesll:
+; CHECK-LE:       # %bb.0: # %entry
+; CHECK-LE-NEXT:    xor r3, r3, r4
+; CHECK-LE-NEXT:    addic r4, r3, -1
+; CHECK-LE-NEXT:    subfe r3, r4, r3
+; CHECK-LE-NEXT:    blr
 entry:
   %cmp = icmp ne i64 %a, %b
   %conv = zext i1 %cmp to i32
@@ -28,6 +41,19 @@ define signext i32 @test_inesll_sext(i64 %a, i64 %b) {
 ; CHECK-NEXT:    subfic r3, r3, 0
 ; CHECK-NEXT:    subfe r3, r3, r3
 ; CHECK-NEXT:    blr
+; CHECK-BE-LABEL: test_inesll_sext:
+; CHECK-BE:       # %bb.0: # %entry
+; CHECK-BE-NEXT:    xor r3, r3, r4
+; CHECK-BE-NEXT:    subfic r3, r3, 0
+; CHECK-BE-NEXT:    subfe r3, r3, r3
+; CHECK-BE-NEXT:    blr
+;
+; CHECK-LE-LABEL: test_inesll_sext:
+; CHECK-LE:       # %bb.0: # %entry
+; CHECK-LE-NEXT:    xor r3, r3, r4
+; CHECK-LE-NEXT:    subfic r3, r3, 0
+; CHECK-LE-NEXT:    subfe r3, r3, r3
+; CHECK-LE-NEXT:    blr
 entry:
   %cmp = icmp ne i64 %a, %b
   %sub = sext i1 %cmp to i32
@@ -40,6 +66,17 @@ define signext i32 @test_inesll_z(i64 %a) {
 ; CHECK-NEXT:    addic r4, r3, -1
 ; CHECK-NEXT:    subfe r3, r4, r3
 ; CHECK-NEXT:    blr
+; CHECK-BE-LABEL: test_inesll_z:
+; CHECK-BE:       # %bb.0: # %entry
+; CHECK-BE-NEXT:    addic r4, r3, -1
+; CHECK-BE-NEXT:    subfe r3, r4, r3
+; CHECK-BE-NEXT:    blr
+;
+; CHECK-LE-LABEL: test_inesll_z:
+; CHECK-LE:       # %bb.0: # %entry
+; CHECK-LE-NEXT:    addic r4, r3, -1
+; CHECK-LE-NEXT:    subfe r3, r4, r3
+; CHECK-LE-NEXT:    blr
 entry:
   %cmp = icmp ne i64 %a, 0
   %conv = zext i1 %cmp to i32
@@ -52,6 +89,17 @@ define signext i32 @test_inesll_sext_z(i64 %a) {
 ; CHECK-NEXT:    subfic r3, r3, 0
 ; CHECK-NEXT:    subfe r3, r3, r3
 ; CHECK-NEXT:    blr
+; CHECK-BE-LABEL: test_inesll_sext_z:
+; CHECK-BE:       # %bb.0: # %entry
+; CHECK-BE-NEXT:    subfic r3, r3, 0
+; CHECK-BE-NEXT:    subfe r3, r3, r3
+; CHECK-BE-NEXT:    blr
+;
+; CHECK-LE-LABEL: test_inesll_sext_z:
+; CHECK-LE:       # %bb.0: # %entry
+; CHECK-LE-NEXT:    subfic r3, r3, 0
+; CHECK-LE-NEXT:    subfe r3, r3, r3
+; CHECK-LE-NEXT:    blr
 entry:
   %cmp = icmp ne i64 %a, 0
   %sub = sext i1 %cmp to i32
@@ -61,13 +109,30 @@ entry:
 define void @test_inesll_store(i64 %a, i64 %b) {
 ; CHECK-LABEL: test_inesll_store:
 ; CHECK:       # %bb.0: # %entry
-; CHECK-NEXT:    addis r5, r2, .LC0@toc@ha
 ; CHECK-NEXT:    xor r3, r3, r4
-; CHECK-NEXT:    ld r4, .LC0@toc@l(r5)
-; CHECK-NEXT:    addic r5, r3, -1
-; CHECK-NEXT:    subfe r3, r5, r3
-; CHECK-NEXT:    std r3, 0(r4)
+; CHECK-NEXT:    addis r5, r2, glob@toc@ha
+; CHECK-NEXT:    addic r4, r3, -1
+; CHECK-NEXT:    subfe r3, r4, r3
+; CHECK-NEXT:    std r3, glob@toc@l(r5)
 ; CHECK-NEXT:    blr
+; CHECK-BE-LABEL: test_inesll_store:
+; CHECK-BE:       # %bb.0: # %entry
+; CHECK-BE-NEXT:    addis r5, r2, .LC0@toc@ha
+; CHECK-BE-NEXT:    xor r3, r3, r4
+; CHECK-BE-NEXT:    ld r4, .LC0@toc@l(r5)
+; CHECK-BE-NEXT:    addic r5, r3, -1
+; CHECK-BE-NEXT:    subfe r3, r5, r3
+; CHECK-BE-NEXT:    std r3, 0(r4)
+; CHECK-BE-NEXT:    blr
+;
+; CHECK-LE-LABEL: test_inesll_store:
+; CHECK-LE:       # %bb.0: # %entry
+; CHECK-LE-NEXT:    xor r3, r3, r4
+; CHECK-LE-NEXT:    addis r5, r2, glob@toc@ha
+; CHECK-LE-NEXT:    addic r4, r3, -1
+; CHECK-LE-NEXT:    subfe r3, r4, r3
+; CHECK-LE-NEXT:    std r3, glob@toc@l(r5)
+; CHECK-LE-NEXT:    blr
 entry:
   %cmp = icmp ne i64 %a, %b
   %conv1 = zext i1 %cmp to i64
@@ -78,13 +143,30 @@ entry:
 define void @test_inesll_sext_store(i64 %a, i64 %b) {
 ; CHECK-LABEL: test_inesll_sext_store:
 ; CHECK:       # %bb.0: # %entry
-; CHECK-NEXT:    addis r5, r2, .LC0@toc@ha
 ; CHECK-NEXT:    xor r3, r3, r4
-; CHECK-NEXT:    ld r4, .LC0@toc@l(r5)
+; CHECK-NEXT:    addis r5, r2, glob@toc@ha
 ; CHECK-NEXT:    subfic r3, r3, 0
 ; CHECK-NEXT:    subfe r3, r3, r3
-; CHECK-NEXT:    std r3, 0(r4)
+; CHECK-NEXT:    std r3, glob@toc@l(r5)
 ; CHECK-NEXT:    blr
+; CHECK-BE-LABEL: test_inesll_sext_store:
+; CHECK-BE:       # %bb.0: # %entry
+; CHECK-BE-NEXT:    addis r5, r2, .LC0@toc@ha
+; CHECK-BE-NEXT:    xor r3, r3, r4
+; CHECK-BE-NEXT:    ld r4, .LC0@toc@l(r5)
+; CHECK-BE-NEXT:    subfic r3, r3, 0
+; CHECK-BE-NEXT:    subfe r3, r3, r3
+; CHECK-BE-NEXT:    std r3, 0(r4)
+; CHECK-BE-NEXT:    blr
+;
+; CHECK-LE-LABEL: test_inesll_sext_store:
+; CHECK-LE:       # %bb.0: # %entry
+; CHECK-LE-NEXT:    xor r3, r3, r4
+; CHECK-LE-NEXT:    addis r5, r2, glob@toc@ha
+; CHECK-LE-NEXT:    subfic r3, r3, 0
+; CHECK-LE-NEXT:    subfe r3, r3, r3
+; CHECK-LE-NEXT:    std r3, glob@toc@l(r5)
+; CHECK-LE-NEXT:    blr
 entry:
   %cmp = icmp ne i64 %a, %b
   %conv1 = sext i1 %cmp to i64
@@ -95,12 +177,27 @@ entry:
 define void @test_inesll_z_store(i64 %a) {
 ; CHECK-LABEL: test_inesll_z_store:
 ; CHECK:       # %bb.0: # %entry
-; CHECK-NEXT:    addis r4, r2, .LC0@toc@ha
 ; CHECK-NEXT:    addic r5, r3, -1
-; CHECK-NEXT:    ld r4, .LC0@toc@l(r4)
+; CHECK-NEXT:    addis r4, r2, glob@toc@ha
 ; CHECK-NEXT:    subfe r3, r5, r3
-; CHECK-NEXT:    std r3, 0(r4)
+; CHECK-NEXT:    std r3, glob@toc@l(r4)
 ; CHECK-NEXT:    blr
+; CHECK-BE-LABEL: test_inesll_z_store:
+; CHECK-BE:       # %bb.0: # %entry
+; CHECK-BE-NEXT:    addis r4, r2, .LC0@toc@ha
+; CHECK-BE-NEXT:    addic r5, r3, -1
+; CHECK-BE-NEXT:    ld r4, .LC0@toc@l(r4)
+; CHECK-BE-NEXT:    subfe r3, r5, r3
+; CHECK-BE-NEXT:    std r3, 0(r4)
+; CHECK-BE-NEXT:    blr
+;
+; CHECK-LE-LABEL: test_inesll_z_store:
+; CHECK-LE:       # %bb.0: # %entry
+; CHECK-LE-NEXT:    addic r5, r3, -1
+; CHECK-LE-NEXT:    addis r4, r2, glob@toc@ha
+; CHECK-LE-NEXT:    subfe r3, r5, r3
+; CHECK-LE-NEXT:    std r3, glob@toc@l(r4)
+; CHECK-LE-NEXT:    blr
 entry:
   %cmp = icmp ne i64 %a, 0
   %conv1 = zext i1 %cmp to i64
@@ -111,12 +208,27 @@ entry:
 define void @test_inesll_sext_z_store(i64 %a) {
 ; CHECK-LABEL: test_inesll_sext_z_store:
 ; CHECK:       # %bb.0: # %entry
-; CHECK-NEXT:    addis r4, r2, .LC0@toc@ha
 ; CHECK-NEXT:    subfic r3, r3, 0
-; CHECK-NEXT:    ld r4, .LC0@toc@l(r4)
+; CHECK-NEXT:    addis r4, r2, glob@toc@ha
 ; CHECK-NEXT:    subfe r3, r3, r3
-; CHECK-NEXT:    std r3, 0(r4)
+; CHECK-NEXT:    std r3, glob@toc@l(r4)
 ; CHECK-NEXT:    blr
+; CHECK-BE-LABEL: test_inesll_sext_z_store:
+; CHECK-BE:       # %bb.0: # %entry
+; CHECK-BE-NEXT:    addis r4, r2, .LC0@toc@ha
+; CHECK-BE-NEXT:    subfic r3, r3, 0
+; CHECK-BE-NEXT:    ld r4, .LC0@toc@l(r4)
+; CHECK-BE-NEXT:    subfe r3, r3, r3
+; CHECK-BE-NEXT:    std r3, 0(r4)
+; CHECK-BE-NEXT:    blr
+;
+; CHECK-LE-LABEL: test_inesll_sext_z_store:
+; CHECK-LE:       # %bb.0: # %entry
+; CHECK-LE-NEXT:    subfic r3, r3, 0
+; CHECK-LE-NEXT:    addis r4, r2, glob@toc@ha
+; CHECK-LE-NEXT:    subfe r3, r3, r3
+; CHECK-LE-NEXT:    std r3, glob@toc@l(r4)
+; CHECK-LE-NEXT:    blr
 entry:
   %cmp = icmp ne i64 %a, 0
   %conv1 = sext i1 %cmp to i64