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authorStefan Pintilie <stefanp@ca.ibm.com>2018-12-04 20:14:57 +0000
committerStefan Pintilie <stefanp@ca.ibm.com>2018-12-04 20:14:57 +0000
commit46f840f28678dbdcfc9e97fd1185ca99d33995f9 (patch)
treebda3de3a3aa3e339366cb62938a293dc37c2ce18 /llvm/test/CodeGen/PowerPC/testComparesinesi.ll
parentf3c8a007601044158b2868ab06594b0ce18d06f4 (diff)
downloadbcm5719-llvm-46f840f28678dbdcfc9e97fd1185ca99d33995f9.tar.gz
bcm5719-llvm-46f840f28678dbdcfc9e97fd1185ca99d33995f9.zip
[PowerPC] Make no-PIC default to match GCC - LLVM
Change the default for PowerPC LE to -fno-PIC. Differential Revision: https://reviews.llvm.org/D53383 llvm-svn: 348298
Diffstat (limited to 'llvm/test/CodeGen/PowerPC/testComparesinesi.ll')
-rw-r--r--llvm/test/CodeGen/PowerPC/testComparesinesi.ll206
1 files changed, 179 insertions, 27 deletions
diff --git a/llvm/test/CodeGen/PowerPC/testComparesinesi.ll b/llvm/test/CodeGen/PowerPC/testComparesinesi.ll
index b47f6c80849..3b0fe78e99c 100644
--- a/llvm/test/CodeGen/PowerPC/testComparesinesi.ll
+++ b/llvm/test/CodeGen/PowerPC/testComparesinesi.ll
@@ -1,20 +1,36 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc -verify-machineinstrs -mtriple=powerpc64-unknown-linux-gnu -O2 \
-; RUN: -ppc-gpr-icmps=all -ppc-asm-full-reg-names -mcpu=pwr8 < %s | FileCheck %s \
+; RUN: -ppc-gpr-icmps=all -ppc-asm-full-reg-names -mcpu=pwr8 < %s | FileCheck %s --check-prefix=CHECK-BE \
; RUN: --implicit-check-not cmpw --implicit-check-not cmpd --implicit-check-not cmpl
; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-linux-gnu -O2 \
-; RUN: -ppc-gpr-icmps=all -ppc-asm-full-reg-names -mcpu=pwr8 < %s | FileCheck %s \
+; RUN: -ppc-gpr-icmps=all -ppc-asm-full-reg-names -mcpu=pwr8 < %s | FileCheck %s --check-prefix=CHECK-LE \
; RUN: --implicit-check-not cmpw --implicit-check-not cmpd --implicit-check-not cmpl
-; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
@glob = common local_unnamed_addr global i32 0, align 4
define signext i32 @test_inesi(i32 signext %a, i32 signext %b) {
; CHECK-LABEL: test_inesi:
-; CHECK: xor r3, r3, r4
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: xor r3, r3, r4
; CHECK-NEXT: cntlzw r3, r3
; CHECK-NEXT: srwi r3, r3, 5
; CHECK-NEXT: xori r3, r3, 1
; CHECK-NEXT: blr
+; CHECK-BE-LABEL: test_inesi:
+; CHECK-BE: # %bb.0: # %entry
+; CHECK-BE-NEXT: xor r3, r3, r4
+; CHECK-BE-NEXT: cntlzw r3, r3
+; CHECK-BE-NEXT: srwi r3, r3, 5
+; CHECK-BE-NEXT: xori r3, r3, 1
+; CHECK-BE-NEXT: blr
+;
+; CHECK-LE-LABEL: test_inesi:
+; CHECK-LE: # %bb.0: # %entry
+; CHECK-LE-NEXT: xor r3, r3, r4
+; CHECK-LE-NEXT: cntlzw r3, r3
+; CHECK-LE-NEXT: srwi r3, r3, 5
+; CHECK-LE-NEXT: xori r3, r3, 1
+; CHECK-LE-NEXT: blr
entry:
%cmp = icmp ne i32 %a, %b
%conv = zext i1 %cmp to i32
@@ -23,12 +39,30 @@ entry:
define signext i32 @test_inesi_sext(i32 signext %a, i32 signext %b) {
; CHECK-LABEL: test_inesi_sext:
-; CHECK: xor r3, r3, r4
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: xor r3, r3, r4
; CHECK-NEXT: cntlzw r3, r3
; CHECK-NEXT: srwi r3, r3, 5
; CHECK-NEXT: xori r3, r3, 1
; CHECK-NEXT: neg r3, r3
; CHECK-NEXT: blr
+; CHECK-BE-LABEL: test_inesi_sext:
+; CHECK-BE: # %bb.0: # %entry
+; CHECK-BE-NEXT: xor r3, r3, r4
+; CHECK-BE-NEXT: cntlzw r3, r3
+; CHECK-BE-NEXT: srwi r3, r3, 5
+; CHECK-BE-NEXT: xori r3, r3, 1
+; CHECK-BE-NEXT: neg r3, r3
+; CHECK-BE-NEXT: blr
+;
+; CHECK-LE-LABEL: test_inesi_sext:
+; CHECK-LE: # %bb.0: # %entry
+; CHECK-LE-NEXT: xor r3, r3, r4
+; CHECK-LE-NEXT: cntlzw r3, r3
+; CHECK-LE-NEXT: srwi r3, r3, 5
+; CHECK-LE-NEXT: xori r3, r3, 1
+; CHECK-LE-NEXT: neg r3, r3
+; CHECK-LE-NEXT: blr
entry:
%cmp = icmp ne i32 %a, %b
%sub = sext i1 %cmp to i32
@@ -37,10 +71,24 @@ entry:
define signext i32 @test_inesi_z(i32 signext %a) {
; CHECK-LABEL: test_inesi_z:
-; CHECK: cntlzw r3, r3
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: cntlzw r3, r3
; CHECK-NEXT: srwi r3, r3, 5
; CHECK-NEXT: xori r3, r3, 1
; CHECK-NEXT: blr
+; CHECK-BE-LABEL: test_inesi_z:
+; CHECK-BE: # %bb.0: # %entry
+; CHECK-BE-NEXT: cntlzw r3, r3
+; CHECK-BE-NEXT: srwi r3, r3, 5
+; CHECK-BE-NEXT: xori r3, r3, 1
+; CHECK-BE-NEXT: blr
+;
+; CHECK-LE-LABEL: test_inesi_z:
+; CHECK-LE: # %bb.0: # %entry
+; CHECK-LE-NEXT: cntlzw r3, r3
+; CHECK-LE-NEXT: srwi r3, r3, 5
+; CHECK-LE-NEXT: xori r3, r3, 1
+; CHECK-LE-NEXT: blr
entry:
%cmp = icmp ne i32 %a, 0
%conv = zext i1 %cmp to i32
@@ -49,11 +97,27 @@ entry:
define signext i32 @test_inesi_sext_z(i32 signext %a) {
; CHECK-LABEL: test_inesi_sext_z:
-; CHECK: cntlzw r3, r3
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: cntlzw r3, r3
; CHECK-NEXT: srwi r3, r3, 5
; CHECK-NEXT: xori r3, r3, 1
; CHECK-NEXT: neg r3, r3
; CHECK-NEXT: blr
+; CHECK-BE-LABEL: test_inesi_sext_z:
+; CHECK-BE: # %bb.0: # %entry
+; CHECK-BE-NEXT: cntlzw r3, r3
+; CHECK-BE-NEXT: srwi r3, r3, 5
+; CHECK-BE-NEXT: xori r3, r3, 1
+; CHECK-BE-NEXT: neg r3, r3
+; CHECK-BE-NEXT: blr
+;
+; CHECK-LE-LABEL: test_inesi_sext_z:
+; CHECK-LE: # %bb.0: # %entry
+; CHECK-LE-NEXT: cntlzw r3, r3
+; CHECK-LE-NEXT: srwi r3, r3, 5
+; CHECK-LE-NEXT: xori r3, r3, 1
+; CHECK-LE-NEXT: neg r3, r3
+; CHECK-LE-NEXT: blr
entry:
%cmp = icmp ne i32 %a, 0
%sub = sext i1 %cmp to i32
@@ -62,12 +126,34 @@ entry:
define void @test_inesi_store(i32 signext %a, i32 signext %b) {
; CHECK-LABEL: test_inesi_store:
-; CHECK: xor r3, r3, r4
-; CHECK: cntlzw r3, r3
-; CHECK: srwi r3, r3, 5
-; CHECK: xori r3, r3, 1
-; CHECK: stw r3, 0(r4)
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: xor r3, r3, r4
+; CHECK-NEXT: addis r5, r2, glob@toc@ha
+; CHECK-NEXT: cntlzw r3, r3
+; CHECK-NEXT: srwi r3, r3, 5
+; CHECK-NEXT: xori r3, r3, 1
+; CHECK-NEXT: stw r3, glob@toc@l(r5)
; CHECK-NEXT: blr
+; CHECK-BE-LABEL: test_inesi_store:
+; CHECK-BE: # %bb.0: # %entry
+; CHECK-BE-NEXT: addis r5, r2, .LC0@toc@ha
+; CHECK-BE-NEXT: xor r3, r3, r4
+; CHECK-BE-NEXT: cntlzw r3, r3
+; CHECK-BE-NEXT: ld r4, .LC0@toc@l(r5)
+; CHECK-BE-NEXT: srwi r3, r3, 5
+; CHECK-BE-NEXT: xori r3, r3, 1
+; CHECK-BE-NEXT: stw r3, 0(r4)
+; CHECK-BE-NEXT: blr
+;
+; CHECK-LE-LABEL: test_inesi_store:
+; CHECK-LE: # %bb.0: # %entry
+; CHECK-LE-NEXT: xor r3, r3, r4
+; CHECK-LE-NEXT: addis r5, r2, glob@toc@ha
+; CHECK-LE-NEXT: cntlzw r3, r3
+; CHECK-LE-NEXT: srwi r3, r3, 5
+; CHECK-LE-NEXT: xori r3, r3, 1
+; CHECK-LE-NEXT: stw r3, glob@toc@l(r5)
+; CHECK-LE-NEXT: blr
entry:
%cmp = icmp ne i32 %a, %b
%conv = zext i1 %cmp to i32
@@ -77,13 +163,37 @@ entry:
define void @test_inesi_sext_store(i32 signext %a, i32 signext %b) {
; CHECK-LABEL: test_inesi_sext_store:
-; CHECK: xor r3, r3, r4
-; CHECK: cntlzw r3, r3
-; CHECK: srwi r3, r3, 5
-; CHECK: xori r3, r3, 1
-; CHECK: neg r3, r3
-; CHECK: stw r3, 0(r4)
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: xor r3, r3, r4
+; CHECK-NEXT: addis r5, r2, glob@toc@ha
+; CHECK-NEXT: cntlzw r3, r3
+; CHECK-NEXT: srwi r3, r3, 5
+; CHECK-NEXT: xori r3, r3, 1
+; CHECK-NEXT: neg r3, r3
+; CHECK-NEXT: stw r3, glob@toc@l(r5)
; CHECK-NEXT: blr
+; CHECK-BE-LABEL: test_inesi_sext_store:
+; CHECK-BE: # %bb.0: # %entry
+; CHECK-BE-NEXT: xor r3, r3, r4
+; CHECK-BE-NEXT: addis r5, r2, .LC0@toc@ha
+; CHECK-BE-NEXT: cntlzw r3, r3
+; CHECK-BE-NEXT: ld r4, .LC0@toc@l(r5)
+; CHECK-BE-NEXT: srwi r3, r3, 5
+; CHECK-BE-NEXT: xori r3, r3, 1
+; CHECK-BE-NEXT: neg r3, r3
+; CHECK-BE-NEXT: stw r3, 0(r4)
+; CHECK-BE-NEXT: blr
+;
+; CHECK-LE-LABEL: test_inesi_sext_store:
+; CHECK-LE: # %bb.0: # %entry
+; CHECK-LE-NEXT: xor r3, r3, r4
+; CHECK-LE-NEXT: addis r5, r2, glob@toc@ha
+; CHECK-LE-NEXT: cntlzw r3, r3
+; CHECK-LE-NEXT: srwi r3, r3, 5
+; CHECK-LE-NEXT: xori r3, r3, 1
+; CHECK-LE-NEXT: neg r3, r3
+; CHECK-LE-NEXT: stw r3, glob@toc@l(r5)
+; CHECK-LE-NEXT: blr
entry:
%cmp = icmp ne i32 %a, %b
%sub = sext i1 %cmp to i32
@@ -93,11 +203,31 @@ entry:
define void @test_inesi_z_store(i32 signext %a) {
; CHECK-LABEL: test_inesi_z_store:
-; CHECK: cntlzw r3, r3
-; CHECK: srwi r3, r3, 5
-; CHECK: xori r3, r3, 1
-; CHECK: stw r3, 0(r4)
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: cntlzw r3, r3
+; CHECK-NEXT: addis r4, r2, glob@toc@ha
+; CHECK-NEXT: srwi r3, r3, 5
+; CHECK-NEXT: xori r3, r3, 1
+; CHECK-NEXT: stw r3, glob@toc@l(r4)
; CHECK-NEXT: blr
+; CHECK-BE-LABEL: test_inesi_z_store:
+; CHECK-BE: # %bb.0: # %entry
+; CHECK-BE-NEXT: addis r4, r2, .LC0@toc@ha
+; CHECK-BE-NEXT: cntlzw r3, r3
+; CHECK-BE-NEXT: ld r4, .LC0@toc@l(r4)
+; CHECK-BE-NEXT: srwi r3, r3, 5
+; CHECK-BE-NEXT: xori r3, r3, 1
+; CHECK-BE-NEXT: stw r3, 0(r4)
+; CHECK-BE-NEXT: blr
+;
+; CHECK-LE-LABEL: test_inesi_z_store:
+; CHECK-LE: # %bb.0: # %entry
+; CHECK-LE-NEXT: cntlzw r3, r3
+; CHECK-LE-NEXT: addis r4, r2, glob@toc@ha
+; CHECK-LE-NEXT: srwi r3, r3, 5
+; CHECK-LE-NEXT: xori r3, r3, 1
+; CHECK-LE-NEXT: stw r3, glob@toc@l(r4)
+; CHECK-LE-NEXT: blr
entry:
%cmp = icmp ne i32 %a, 0
%conv = zext i1 %cmp to i32
@@ -107,12 +237,34 @@ entry:
define void @test_inesi_sext_z_store(i32 signext %a) {
; CHECK-LABEL: test_inesi_sext_z_store:
-; CHECK: cntlzw r3, r3
-; CHECK: srwi r3, r3, 5
-; CHECK: xori r3, r3, 1
-; CHECK: neg r3, r3
-; CHECK: stw r3, 0(r4)
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: cntlzw r3, r3
+; CHECK-NEXT: addis r4, r2, glob@toc@ha
+; CHECK-NEXT: srwi r3, r3, 5
+; CHECK-NEXT: xori r3, r3, 1
+; CHECK-NEXT: neg r3, r3
+; CHECK-NEXT: stw r3, glob@toc@l(r4)
; CHECK-NEXT: blr
+; CHECK-BE-LABEL: test_inesi_sext_z_store:
+; CHECK-BE: # %bb.0: # %entry
+; CHECK-BE-NEXT: addis r4, r2, .LC0@toc@ha
+; CHECK-BE-NEXT: cntlzw r3, r3
+; CHECK-BE-NEXT: srwi r3, r3, 5
+; CHECK-BE-NEXT: ld r4, .LC0@toc@l(r4)
+; CHECK-BE-NEXT: xori r3, r3, 1
+; CHECK-BE-NEXT: neg r3, r3
+; CHECK-BE-NEXT: stw r3, 0(r4)
+; CHECK-BE-NEXT: blr
+;
+; CHECK-LE-LABEL: test_inesi_sext_z_store:
+; CHECK-LE: # %bb.0: # %entry
+; CHECK-LE-NEXT: cntlzw r3, r3
+; CHECK-LE-NEXT: addis r4, r2, glob@toc@ha
+; CHECK-LE-NEXT: srwi r3, r3, 5
+; CHECK-LE-NEXT: xori r3, r3, 1
+; CHECK-LE-NEXT: neg r3, r3
+; CHECK-LE-NEXT: stw r3, glob@toc@l(r4)
+; CHECK-LE-NEXT: blr
entry:
%cmp = icmp ne i32 %a, 0
%sub = sext i1 %cmp to i32
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