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authorTony Jiang <jtony@ca.ibm.com>2017-07-10 18:11:23 +0000
committerTony Jiang <jtony@ca.ibm.com>2017-07-10 18:11:23 +0000
commitacefbcf38eb19186af007a68683031aa870d5d96 (patch)
treeec91eb68caa97845d98a270a76c9d20fb32dd0b0 /llvm/test/CodeGen/PowerPC/testBitReverse.ll
parent76ac81379019066d9cb8942a5505eac4909f1caa (diff)
downloadbcm5719-llvm-acefbcf38eb19186af007a68683031aa870d5d96.tar.gz
bcm5719-llvm-acefbcf38eb19186af007a68683031aa870d5d96.zip
[PPC CodeGen] Expand the bitreverse.i64 intrinsic.
Differential Revision: https://reviews.llvm.org/D34908 Fix PR: https://bugs.llvm.org/show_bug.cgi?id=33093 llvm-svn: 307563
Diffstat (limited to 'llvm/test/CodeGen/PowerPC/testBitReverse.ll')
-rw-r--r--llvm/test/CodeGen/PowerPC/testBitReverse.ll63
1 files changed, 63 insertions, 0 deletions
diff --git a/llvm/test/CodeGen/PowerPC/testBitReverse.ll b/llvm/test/CodeGen/PowerPC/testBitReverse.ll
index 661b62596dc..6993d17ad8f 100644
--- a/llvm/test/CodeGen/PowerPC/testBitReverse.ll
+++ b/llvm/test/CodeGen/PowerPC/testBitReverse.ll
@@ -40,3 +40,66 @@ define i32 @testBitReverseIntrinsicI32(i32 %arg) {
%res = call i32 @llvm.bitreverse.i32(i32 %arg)
ret i32 %res
}
+
+declare i64 @llvm.bitreverse.i64(i64)
+define i64 @testBitReverseIntrinsicI64(i64 %arg) {
+; CHECK-LABEL: testBitReverseIntrinsicI64:
+; CHECK: # BB#0:
+; CHECK-NEXT: lis 4, -21846
+; CHECK-NEXT: lis 5, 21845
+; CHECK-NEXT: lis 6, -13108
+; CHECK-NEXT: lis 7, 13107
+; CHECK-NEXT: sldi 8, 3, 1
+; CHECK-NEXT: rldicl 3, 3, 63, 1
+; CHECK-NEXT: ori 4, 4, 43690
+; CHECK-NEXT: ori 5, 5, 21845
+; CHECK-NEXT: ori 6, 6, 52428
+; CHECK-NEXT: ori 7, 7, 13107
+; CHECK-NEXT: sldi 4, 4, 32
+; CHECK-NEXT: sldi 5, 5, 32
+; CHECK-NEXT: oris 4, 4, 43690
+; CHECK-NEXT: oris 5, 5, 21845
+; CHECK-NEXT: ori 4, 4, 43690
+; CHECK-NEXT: ori 5, 5, 21845
+; CHECK-NEXT: and 3, 3, 5
+; CHECK-NEXT: sldi 5, 6, 32
+; CHECK-NEXT: sldi 6, 7, 32
+; CHECK-NEXT: and 4, 8, 4
+; CHECK-NEXT: lis 7, 3855
+; CHECK-NEXT: or 3, 3, 4
+; CHECK-NEXT: oris 12, 5, 52428
+; CHECK-NEXT: oris 9, 6, 13107
+; CHECK-NEXT: lis 6, -3856
+; CHECK-NEXT: ori 7, 7, 3855
+; CHECK-NEXT: sldi 8, 3, 2
+; CHECK-NEXT: ori 4, 12, 52428
+; CHECK-NEXT: rldicl 3, 3, 62, 2
+; CHECK-NEXT: ori 5, 9, 13107
+; CHECK-NEXT: ori 6, 6, 61680
+; CHECK-NEXT: and 3, 3, 5
+; CHECK-NEXT: sldi 5, 6, 32
+; CHECK-NEXT: and 4, 8, 4
+; CHECK-NEXT: sldi 6, 7, 32
+; CHECK-NEXT: or 3, 3, 4
+; CHECK-NEXT: oris 10, 5, 61680
+; CHECK-NEXT: oris 11, 6, 3855
+; CHECK-NEXT: sldi 6, 3, 4
+; CHECK-NEXT: ori 4, 10, 61680
+; CHECK-NEXT: rldicl 3, 3, 60, 4
+; CHECK-NEXT: ori 5, 11, 3855
+; CHECK-NEXT: and 4, 6, 4
+; CHECK-NEXT: and 3, 3, 5
+; CHECK-NEXT: or 3, 3, 4
+; CHECK-NEXT: rldicl 4, 3, 32, 32
+; CHECK-NEXT: rlwinm 6, 3, 24, 0, 31
+; CHECK-NEXT: rlwinm 5, 4, 24, 0, 31
+; CHECK-NEXT: rlwimi 6, 3, 8, 8, 15
+; CHECK-NEXT: rlwimi 5, 4, 8, 8, 15
+; CHECK-NEXT: rlwimi 6, 3, 8, 24, 31
+; CHECK-NEXT: rlwimi 5, 4, 8, 24, 31
+; CHECK-NEXT: sldi 12, 5, 32
+; CHECK-NEXT: or 3, 12, 6
+; CHECK-NEXT: blr
+ %res = call i64 @llvm.bitreverse.i64(i64 %arg)
+ ret i64 %res
+}
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