diff options
| author | Hal Finkel <hfinkel@anl.gov> | 2012-08-28 02:10:15 +0000 |
|---|---|---|
| committer | Hal Finkel <hfinkel@anl.gov> | 2012-08-28 02:10:15 +0000 |
| commit | e39526a789754d8459eed63757cd6782dd2db834 (patch) | |
| tree | 955955d14b7f95bc02162205ff094ce8c0ba012c /llvm/test/CodeGen/PowerPC/ppc64-zext.ll | |
| parent | 557a8d568bd7f32b6695162eba3be07787d9e779 (diff) | |
| download | bcm5719-llvm-e39526a789754d8459eed63757cd6782dd2db834.tar.gz bcm5719-llvm-e39526a789754d8459eed63757cd6782dd2db834.zip | |
Optimize zext on PPC64.
The zeroextend IR instruction is lowered to an 'and' node with an immediate
mask operand, which in turn gets legalised to a sequence of ori's & ands.
This can be done more efficiently using the rldicl instruction.
Patch by Tobias von Koch.
llvm-svn: 162724
Diffstat (limited to 'llvm/test/CodeGen/PowerPC/ppc64-zext.ll')
| -rw-r--r-- | llvm/test/CodeGen/PowerPC/ppc64-zext.ll | 11 |
1 files changed, 11 insertions, 0 deletions
diff --git a/llvm/test/CodeGen/PowerPC/ppc64-zext.ll b/llvm/test/CodeGen/PowerPC/ppc64-zext.ll new file mode 100644 index 00000000000..eb55445cc6c --- /dev/null +++ b/llvm/test/CodeGen/PowerPC/ppc64-zext.ll @@ -0,0 +1,11 @@ +; RUN: llc < %s | FileCheck %s +target datalayout = "E-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v128:128:128-n32:64" +target triple = "powerpc64-unknown-linux" + +define i64 @fun(i32 %arg32) nounwind { +entry: +; CHECK: rldicl {{[0-9]+}}, {{[0-9]+}}, 0, 32 + %o = zext i32 %arg32 to i64 + ret i64 %o +} + |

