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| author | Hal Finkel <hfinkel@anl.gov> | 2013-05-08 12:16:14 +0000 |
|---|---|---|
| committer | Hal Finkel <hfinkel@anl.gov> | 2013-05-08 12:16:14 +0000 |
| commit | 08e53ee551a41bb0d96b4c78d906fc79df3050cd (patch) | |
| tree | cfc77d786a7978c2640d55030c2c9064b3702439 /llvm/test/CodeGen/PowerPC/optcmp.ll | |
| parent | 5829a98c48cf9009e4887e89e3075b3058909e8e (diff) | |
| download | bcm5719-llvm-08e53ee551a41bb0d96b4c78d906fc79df3050cd.tar.gz bcm5719-llvm-08e53ee551a41bb0d96b4c78d906fc79df3050cd.zip | |
PPCInstrInfo::optimizeCompareInstr should not optimize FP compares
The floating-point record forms on PPC don't set the condition register bits
based on a comparison with zero (like the integer record forms do), but rather
based on the exception status bits.
llvm-svn: 181423
Diffstat (limited to 'llvm/test/CodeGen/PowerPC/optcmp.ll')
| -rw-r--r-- | llvm/test/CodeGen/PowerPC/optcmp.ll | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/llvm/test/CodeGen/PowerPC/optcmp.ll b/llvm/test/CodeGen/PowerPC/optcmp.ll index 1fce464dd33..523f329303b 100644 --- a/llvm/test/CodeGen/PowerPC/optcmp.ll +++ b/llvm/test/CodeGen/PowerPC/optcmp.ll @@ -118,7 +118,7 @@ entry: ret double %cond ; CHECK: @food -; CHECK: fsub. 0, 1, 2 +; CHECK-NOT: fsub. 0, 1, 2 ; CHECK: stfd 0, 0(5) } @@ -131,7 +131,7 @@ entry: ret float %cond ; CHECK: @foof -; CHECK: fsubs. 0, 1, 2 +; CHECK-NOT: fsubs. 0, 1, 2 ; CHECK: stfs 0, 0(5) } |
