[MBP] Avoid tail duplication if it can't bring benefit

Current tail duplication integrated in bb layout is designed to increase the fallthrough from a BB's predecessor to its successor, but we have observed cases that duplication doesn't increase fallthrough, or it brings too much size overhead.

To overcome these two issues in function canTailDuplicateUnplacedPreds I add two checks:

  make sure there is at least one duplication in current work set.
  the number of duplication should not exceed the number of successors.

The modification in hasBetterLayoutPredecessor fixes a bug that potential predecessor must be at the bottom of a chain.

Differential Revision: https://reviews.llvm.org/D64376

1 files changed, 91 insertions, 0 deletions

diff --git a/llvm/test/CodeGen/PowerPC/no-duplicate.ll b/llvm/test/CodeGen/PowerPC/no-duplicate.ll
new file mode 100644
index 00000000000..932ef1aa106
--- /dev/null
+++ b/llvm/test/CodeGen/PowerPC/no-duplicate.ll
@@ -0,0 +1,91 @@
+; RUN: llc -O2 < %s | FileCheck %s
+
+target triple = "powerpc64le-grtev4-linux-gnu"
+
+; No duplication of loop header into entry block.
+define void @no_duplicate1(i64 %a) {
+; CHECK-LABEL: no_duplicate1
+; CHECK:        mr 30, 3
+; CHECK-NEXT:   b .LBB0_2
+
+; CHECK:      .LBB0_2:
+; CHECK-NEXT:   # =>This Inner Loop Header: Depth=1
+; CHECK-NEXT:   cmpldi 30, 100
+; CHECK-NEXT:   bne 0, .LBB0_1
+entry:
+  br label %header
+
+header:
+  %ind = phi i64 [%a, %entry], [%val3, %latch]
+  %cond1 = icmp eq i64 %ind, 100
+  br i1 %cond1, label %middle, label %latch
+
+middle:
+  %condx = call i1 @foo()
+  %val1 = xor i64 %ind, 2
+  br label %latch
+
+latch:
+  %val2 = phi i64 [%ind, %header], [%val1, %middle]
+  %val3 = add i64 %val2, 1
+  %cond2 = call i1 @foo()
+  br i1 %cond2, label %end, label %header
+
+end:
+  ret void
+}
+
+; No duplication of loop header into latches.
+define void @no_duplicate2(i64 %a) {
+; CHECK-LABEL: no_duplicate2
+; CHECK:        mr 30, 3
+; CHECK-NEXT:   b .LBB1_2
+
+; CHECK:      .LBB1_2:
+; CHECK-NEXT:   # =>This Inner Loop Header: Depth=1
+; CHECK-NEXT:   cmpldi 30, 100
+; CHECK-NEXT:   bne 0, .LBB1_1
+
+; CHECK:      %latch2
+; CHECK:        b .LBB1_2
+
+; CHECK:      %latch3
+; CHECK:        b .LBB1_2
+entry:
+  br label %header
+
+header:
+  %ind = phi i64 [%a, %entry], [%val1, %latch1], [%val2, %latch2], [%val2, %latch3]
+  %cond1 = icmp eq i64 %ind, 100
+  br i1 %cond1, label %middle1, label %latch1
+
+latch1:
+  %cond2 = call i1 @foo()
+  %val1 = xor i64 %ind, 2
+  br i1 %cond2, label %end, label %header
+
+middle1:
+  %cond3 = call i1 @foo()
+  br i1 %cond3, label %latch1, label %middle2
+
+middle2:
+  %cond4 = call i1 @foo()
+  %val2 = add i64 %ind, 1
+  br i1 %cond4, label %latch2, label %latch3
+
+latch2:
+  call void @a()
+  br label %header
+
+latch3:
+  call void @b()
+  br label %header
+
+end:
+  ret void
+}
+
+
+declare i1 @foo()
+declare void @a()
+declare void @b()