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author | Sanjay Patel <spatel@rotateright.com> | 2017-06-07 16:16:45 +0000 |
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committer | Sanjay Patel <spatel@rotateright.com> | 2017-06-07 16:16:45 +0000 |
commit | 8ce1e3b759c483f3498b7b221445d5a52d54f640 (patch) | |
tree | d03d5dab5742227ad625f885187be0e4baefe4da /llvm/test/CodeGen/PowerPC/memCmpUsedInZeroEqualityComparison.ll | |
parent | 5a2f881b393ff09e50ed5b6a5f00b267f536cbfe (diff) | |
download | bcm5719-llvm-8ce1e3b759c483f3498b7b221445d5a52d54f640.tar.gz bcm5719-llvm-8ce1e3b759c483f3498b7b221445d5a52d54f640.zip |
[CGP] avoid zext/trunc of a memcmp expansion compare
This could be viewed as another shortcoming of the DAGCombiner:
when both operands of a compare are zexted from the same source
type, we should be able to compare the original types.
The effect on PowerPC perf is likely unnoticeable, but there's a
visible regression for x86 if we feed the suboptimal IR for memcmp
expansion to the DAG:
_cmp_eq4_zexted_to_i64:
movl (%rdi), %ecx
movl (%rsi), %edx
xorl %eax, %eax
cmpq %rdx, %rcx
sete %al
_cmp_eq4_better:
movl (%rdi), %ecx
xorl %eax, %eax
cmpl (%rsi), %ecx
sete %al
llvm-svn: 304923
Diffstat (limited to 'llvm/test/CodeGen/PowerPC/memCmpUsedInZeroEqualityComparison.ll')
-rw-r--r-- | llvm/test/CodeGen/PowerPC/memCmpUsedInZeroEqualityComparison.ll | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/llvm/test/CodeGen/PowerPC/memCmpUsedInZeroEqualityComparison.ll b/llvm/test/CodeGen/PowerPC/memCmpUsedInZeroEqualityComparison.ll index a48a42ee918..84d3e884102 100644 --- a/llvm/test/CodeGen/PowerPC/memCmpUsedInZeroEqualityComparison.ll +++ b/llvm/test/CodeGen/PowerPC/memCmpUsedInZeroEqualityComparison.ll @@ -21,7 +21,7 @@ define signext i32 @zeroEqualityTest02(i8* %x, i8* %y) { ; CHECK-NEXT: lwz 3, 0(3) ; CHECK-NEXT: lwz 4, 0(4) ; CHECK-NEXT: li 5, 1 -; CHECK-NEXT: cmpld 3, 4 +; CHECK-NEXT: cmplw 3, 4 ; CHECK-NEXT: isel 3, 0, 5, 2 ; CHECK-NEXT: clrldi 3, 3, 32 ; CHECK-NEXT: blr @@ -64,17 +64,17 @@ define signext i32 @zeroEqualityTest03(i8* %x, i8* %y) { ; CHECK: # BB#0: # %loadbb ; CHECK-NEXT: lwz 5, 0(3) ; CHECK-NEXT: lwz 6, 0(4) -; CHECK-NEXT: cmpld 5, 6 +; CHECK-NEXT: cmplw 5, 6 ; CHECK-NEXT: bne 0, .LBB2_3 ; CHECK-NEXT: # BB#1: # %loadbb1 ; CHECK-NEXT: lhz 5, 4(3) ; CHECK-NEXT: lhz 6, 4(4) -; CHECK-NEXT: cmpld 5, 6 +; CHECK-NEXT: cmplw 5, 6 ; CHECK-NEXT: bne 0, .LBB2_3 ; CHECK-NEXT: # BB#2: # %loadbb2 ; CHECK-NEXT: lbz 3, 6(3) ; CHECK-NEXT: lbz 4, 6(4) -; CHECK-NEXT: cmpld 3, 4 +; CHECK-NEXT: cmplw 3, 4 ; CHECK-NEXT: li 3, 0 ; CHECK-NEXT: beq 0, .LBB2_4 ; CHECK-NEXT: .LBB2_3: # %res_block |