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| author | Nemanja Ivanovic <nemanja.i.ibm@gmail.com> | 2017-12-13 14:47:35 +0000 |
|---|---|---|
| committer | Nemanja Ivanovic <nemanja.i.ibm@gmail.com> | 2017-12-13 14:47:35 +0000 |
| commit | 6f590bf8bb3328f33dde73f50f1e408a13cf53a9 (patch) | |
| tree | 4e766be0d1a1a054476f355bc7fbf629a1bb557d /llvm/test/CodeGen/PowerPC/licm-remat.ll | |
| parent | 88e6f83f9eedf16ff0bff40f3714a1d64f2367c4 (diff) | |
| download | bcm5719-llvm-6f590bf8bb3328f33dde73f50f1e408a13cf53a9.tar.gz bcm5719-llvm-6f590bf8bb3328f33dde73f50f1e408a13cf53a9.zip | |
[PowerPC] MachineSSA pass to reduce the number of CR-logical operations
The initial implementation of an MI SSA pass to reduce cr-logical operations.
Currently, the only operations handled by the pass are binary operations where
both CR-inputs come from the same block and the single use is a conditional
branch (also in the same block).
Committing this off by default to allow for a period of field testing. Will
enable it by default in a follow-up patch soon.
Differential Revision: https://reviews.llvm.org/D30431
llvm-svn: 320584
Diffstat (limited to 'llvm/test/CodeGen/PowerPC/licm-remat.ll')
| -rw-r--r-- | llvm/test/CodeGen/PowerPC/licm-remat.ll | 7 |
1 files changed, 4 insertions, 3 deletions
diff --git a/llvm/test/CodeGen/PowerPC/licm-remat.ll b/llvm/test/CodeGen/PowerPC/licm-remat.ll index 393c56bcb86..f9c14052452 100644 --- a/llvm/test/CodeGen/PowerPC/licm-remat.ll +++ b/llvm/test/CodeGen/PowerPC/licm-remat.ll @@ -1,4 +1,5 @@ -; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-linux-gnu < %s | FileCheck %s +; RUN: llc -verify-machineinstrs -ppc-reduce-cr-logicals \ +; RUN: -mtriple=powerpc64le-unknown-linux-gnu < %s | FileCheck %s ; Test case is reduced from the snappy benchmark. ; Verify MachineLICM will always hoist trivially rematerializable instructions even when register pressure is high. @@ -21,8 +22,8 @@ define linkonce_odr void @ZN6snappyDecompressor_(%"class.snappy::SnappyDecompres ; CHECK: # %bb.0: # %entry ; CHECK: addis 3, 2, _ZN6snappy8internalL8wordmaskE@toc@ha ; CHECK-DAG: addi 25, 3, _ZN6snappy8internalL8wordmaskE@toc@l -; CHECK-DAG: addis 4, 2, _ZN6snappy8internalL10char_tableE@toc@ha -; CHECK-DAG: addi 24, 4, _ZN6snappy8internalL10char_tableE@toc@l +; CHECK-DAG: addis 5, 2, _ZN6snappy8internalL10char_tableE@toc@ha +; CHECK-DAG: addi 24, 5, _ZN6snappy8internalL10char_tableE@toc@l ; CHECK: b .LBB0_2 ; CHECK: .LBB0_2: # %for.cond ; CHECK-NOT: addis {{[0-9]+}}, 2, _ZN6snappy8internalL8wordmaskE@toc@ha |
