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authorStefan Pintilie <stefanp@ca.ibm.com>2019-05-24 12:05:37 +0000
committerStefan Pintilie <stefanp@ca.ibm.com>2019-05-24 12:05:37 +0000
commit522307fa40da4b4d892e273c058418e112d844a4 (patch)
tree3779970bb54487bc7086916edbabea054548c22e /llvm/test/CodeGen/PowerPC/knowCRBitSpill.ll
parent33bee053c39b46c6aa46abca6cc758979da44b14 (diff)
downloadbcm5719-llvm-522307fa40da4b4d892e273c058418e112d844a4.tar.gz
bcm5719-llvm-522307fa40da4b4d892e273c058418e112d844a4.zip
[PowerPC] Remove CRBits Copy Of Unset/set CBit
For the situation, where we generate the following code: crxor 8, 8, 8 < Some instructions> .LBB0_1: < Some instructions> cror 1, 8, 8 cror (COPY of CRbit) depends on the result of the crxor instruction. CR8 is known to be zero as crxor is equivalent to CRUNSET. We can simply use crxor 1, 1, 1 instead to zero out CR1, which does not have any dependency on any previous instruction. This patch will optimize it to: < Some instructions> .LBB0_1: < Some instructions> cror 1, 1, 1 Patch By: Victor Huang (NeHuang) Differential Revision: https://reviews.llvm.org/D62044 llvm-svn: 361632
Diffstat (limited to 'llvm/test/CodeGen/PowerPC/knowCRBitSpill.ll')
-rw-r--r--llvm/test/CodeGen/PowerPC/knowCRBitSpill.ll14
1 files changed, 10 insertions, 4 deletions
diff --git a/llvm/test/CodeGen/PowerPC/knowCRBitSpill.ll b/llvm/test/CodeGen/PowerPC/knowCRBitSpill.ll
index be05c57b83f..f49a70325b5 100644
--- a/llvm/test/CodeGen/PowerPC/knowCRBitSpill.ll
+++ b/llvm/test/CodeGen/PowerPC/knowCRBitSpill.ll
@@ -1,6 +1,6 @@
; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-linux-gnu \
; RUN: -ppc-asm-full-reg-names -ppc-vsr-nums-as-vr < %s | FileCheck %s
-; RUN: llc -verify-machineinstrs -mtriple=powerpc64-unknown-linux-gnu \
+; RUN: llc -verify-machineinstrs -mtriple=powerpc64-unknown-linux-gnu -mcpu=pwr8 \
; RUN: -ppc-asm-full-reg-names -ppc-vsr-nums-as-vr < %s | FileCheck %s
@@ -16,13 +16,19 @@
; Function Attrs: nounwind
define dso_local signext i32 @spillCRSET(i32 signext %p1, i32 signext %p2) {
; CHECK-LABEL: spillCRSET:
-; CHECK: # %bb.0: # %entry
-; CHECK: lis [[REG1:.*]], -32768
+; CHECK: # %bb.2:
+; CHECK-DAG: crnor [[CREG:.*]]*cr5+lt, eq, eq
+; CHECK-DAG: mfocrf [[REG2:.*]], [[CREG]]
+; CHECK-DAG: rlwinm [[REG2]], [[REG2]]
+; CHECK: .LBB0_3:
; CHECK-DAG: creqv [[CREG:.*]]*cr5+lt, [[CREG]]*cr5+lt, [[CREG]]*cr5+lt
+; CHECK: lis [[REG1:.*]], -32768
+; CHECK: .LBB0_4:
; CHECK-NOT: mfocrf [[REG2:.*]], [[CREG]]
; CHECK-NOT: rlwinm [[REG2]], [[REG2]]
; CHECK: stw [[REG1]]
-; CHECK: .LBB0_1: # %redo_first_pass
+; CHECK: # %bb.5:
+
entry:
%tobool = icmp eq i32 %p2, 0
%tobool2 = icmp eq i32 %p1, 0
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