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| author | Hal Finkel <hfinkel@anl.gov> | 2013-04-01 17:52:07 +0000 |
|---|---|---|
| committer | Hal Finkel <hfinkel@anl.gov> | 2013-04-01 17:52:07 +0000 |
| commit | f6d45f237977a35291c280826e968e03c9530a30 (patch) | |
| tree | 82c1d172582decaaad14fa9cab4fa9f26ac462c7 /llvm/test/CodeGen/PowerPC/i64_fp_round.ll | |
| parent | c105ba19e93c52a2f378913e85a414722f036337 (diff) | |
| download | bcm5719-llvm-f6d45f237977a35291c280826e968e03c9530a30.tar.gz bcm5719-llvm-f6d45f237977a35291c280826e968e03c9530a30.zip | |
Add more PPC floating-point conversion instructions
The P7 and A2 have additional floating-point conversion instructions which
allow a direct two-instruction sequence (plus load/store) to convert from all
combinations (signed/unsigned i32/i64) <--> (float/double) (on previous cores,
only some combinations were directly available).
llvm-svn: 178480
Diffstat (limited to 'llvm/test/CodeGen/PowerPC/i64_fp_round.ll')
| -rw-r--r-- | llvm/test/CodeGen/PowerPC/i64_fp_round.ll | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/llvm/test/CodeGen/PowerPC/i64_fp_round.ll b/llvm/test/CodeGen/PowerPC/i64_fp_round.ll index 5ae1be8953c..d2a3239ab86 100644 --- a/llvm/test/CodeGen/PowerPC/i64_fp_round.ll +++ b/llvm/test/CodeGen/PowerPC/i64_fp_round.ll @@ -1,4 +1,4 @@ -; RUN: llc -mcpu=pwr7 < %s | FileCheck %s +; RUN: llc -mcpu=pwr7 -mattr=-fpcvt < %s | FileCheck %s target datalayout = "E-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v128:128:128-n32:64" target triple = "powerpc64-unknown-linux-gnu" @@ -22,6 +22,6 @@ entry: ; Also check that with -enable-unsafe-fp-math we do not get that extra ; code sequence. Simply verify that there is no "isel" present. -; RUN: llc -mcpu=pwr7 -enable-unsafe-fp-math < %s | FileCheck %s -check-prefix=UNSAFE +; RUN: llc -mcpu=pwr7 -mattr=-fpcvt -enable-unsafe-fp-math < %s | FileCheck %s -check-prefix=UNSAFE ; CHECK-UNSAFE-NOT: isel |
