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| author | Tony Jiang <jtony@ca.ibm.com> | 2017-01-16 20:12:26 +0000 |
|---|---|---|
| committer | Tony Jiang <jtony@ca.ibm.com> | 2017-01-16 20:12:26 +0000 |
| commit | 8e8c444d3ddf2c6ca045a2487070e0ac30a63dda (patch) | |
| tree | 3cecf7ec2710227b67f20fdd8f9f82877b7021bc /llvm/test/CodeGen/PowerPC/i64_fp_round.ll | |
| parent | 65cce20caaef97b34d38dcf244f4cb2333514ec7 (diff) | |
| download | bcm5719-llvm-8e8c444d3ddf2c6ca045a2487070e0ac30a63dda.tar.gz bcm5719-llvm-8e8c444d3ddf2c6ca045a2487070e0ac30a63dda.zip | |
[PowerPC] Expand ISEL instruction into if-then-else sequence.
Generally, the ISEL is expanded into if-then-else sequence, in some
cases (like when the destination register is the same with the true
or false value register), it may just be expanded into just the if
or else sequence.
llvm-svn: 292154
Diffstat (limited to 'llvm/test/CodeGen/PowerPC/i64_fp_round.ll')
| -rw-r--r-- | llvm/test/CodeGen/PowerPC/i64_fp_round.ll | 8 |
1 files changed, 8 insertions, 0 deletions
diff --git a/llvm/test/CodeGen/PowerPC/i64_fp_round.ll b/llvm/test/CodeGen/PowerPC/i64_fp_round.ll index 1e95dfdec71..5e959f73568 100644 --- a/llvm/test/CodeGen/PowerPC/i64_fp_round.ll +++ b/llvm/test/CodeGen/PowerPC/i64_fp_round.ll @@ -1,4 +1,5 @@ ; RUN: llc -verify-machineinstrs -mcpu=pwr7 -mattr=-fpcvt < %s | FileCheck %s +; RUN: llc -verify-machineinstrs -mcpu=pwr7 -mattr=-fpcvt -ppc-gen-isel=false < %s | FileCheck %s --check-prefix=CHECK-NO-ISEL target datalayout = "E-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v128:128:128-n32:64" target triple = "powerpc64-unknown-linux-gnu" @@ -12,10 +13,17 @@ entry: ; Note that only parts of the sequence are checked for here, to allow ; for minor code generation differences. +;CHECK-LABEL: test +;CHECK-NO-ISEL-LABEL: test ; CHECK: sradi [[REG1:[0-9]+]], 3, 53 ; CHECK: addi [[REG2:[0-9]+]], [[REG1]], 1 ; CHECK: cmpldi [[REG2]], 1 ; CHECK: isel [[REG3:[0-9]+]], {{[0-9]+}}, 3, 1 +; CHECK-NO-ISEL: bc 12, 1, [[TRUE:.LBB[0-9]+]] +; CHECK-NO-ISEL: ori 11, 3, 0 +; CHECK-NO-ISEL-NEXT: b [[SUCCESSOR:.LBB[0-9]+]] +; CHECK-NO-ISEL-NEXT: [[TRUE]] +; CHECK-NO-ISEL-NEXT: addi 11, 4, 0 ; CHECK: std [[REG3]], -{{[0-9]+}}(1) |
