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| author | Hal Finkel <hfinkel@anl.gov> | 2014-03-23 05:35:00 +0000 |
|---|---|---|
| committer | Hal Finkel <hfinkel@anl.gov> | 2014-03-23 05:35:00 +0000 |
| commit | 4a912250fa3830c6cb0bd2ebc8a7e1992b14520b (patch) | |
| tree | 82586bf8e1ecc53a42c556335d5591fa1a0d761b /llvm/test/CodeGen/PowerPC/i32-to-float.ll | |
| parent | 459b5dc39e7e7d636a424606b2ac401bccf281e3 (diff) | |
| download | bcm5719-llvm-4a912250fa3830c6cb0bd2ebc8a7e1992b14520b.tar.gz bcm5719-llvm-4a912250fa3830c6cb0bd2ebc8a7e1992b14520b.zip | |
[PowerPC] Make use of VSX f64 <-> i64 conversion instructions
When VSX is available, these instructions should be used in preference to the
older variants that only have access to the scalar floating-point registers.
llvm-svn: 204559
Diffstat (limited to 'llvm/test/CodeGen/PowerPC/i32-to-float.ll')
| -rw-r--r-- | llvm/test/CodeGen/PowerPC/i32-to-float.ll | 25 |
1 files changed, 25 insertions, 0 deletions
diff --git a/llvm/test/CodeGen/PowerPC/i32-to-float.ll b/llvm/test/CodeGen/PowerPC/i32-to-float.ll index 2707d0352de..371f4e858dc 100644 --- a/llvm/test/CodeGen/PowerPC/i32-to-float.ll +++ b/llvm/test/CodeGen/PowerPC/i32-to-float.ll @@ -1,6 +1,7 @@ ; RUN: llc < %s -mtriple=powerpc64-unknown-linux-gnu -mcpu=g5 | FileCheck %s ; RUN: llc < %s -mtriple=powerpc64-unknown-linux-gnu -mcpu=pwr6 | FileCheck -check-prefix=CHECK-PWR6 %s ; RUN: llc < %s -mtriple=powerpc64-unknown-linux-gnu -mcpu=a2 | FileCheck -check-prefix=CHECK-A2 %s +; RUN: llc < %s -mtriple=powerpc64-unknown-linux-gnu -mcpu=pwr7 -mattr=+vsx | FileCheck -check-prefix=CHECK-VSX %s target datalayout = "E-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-f128:128:128-v128:128:128-n32:64" target triple = "powerpc64-unknown-linux-gnu" @@ -29,6 +30,12 @@ entry: ; CHECK-A2: lfiwax [[REG:[0-9]+]], ; CHECK-A2: fcfids 1, [[REG]] ; CHECK-A2: blr + +; CHECK-VSX: @foo +; CHECK-VSX: stw 3, +; CHECK-VSX: lfiwax [[REG:[0-9]+]], +; CHECK-VSX: fcfids 1, [[REG]] +; CHECK-VSX: blr } define double @goo(i32 %a) nounwind { @@ -54,6 +61,12 @@ entry: ; CHECK-A2: lfiwax [[REG:[0-9]+]], ; CHECK-A2: fcfid 1, [[REG]] ; CHECK-A2: blr + +; CHECK-VSX: @goo +; CHECK-VSX: stw 3, +; CHECK-VSX: lfiwax [[REG:[0-9]+]], +; CHECK-VSX: xscvsxddp 1, [[REG]] +; CHECK-VSX: blr } define float @foou(i32 %a) nounwind { @@ -66,6 +79,12 @@ entry: ; CHECK-A2: lfiwzx [[REG:[0-9]+]], ; CHECK-A2: fcfidus 1, [[REG]] ; CHECK-A2: blr + +; CHECK-VSX: @foou +; CHECK-VSX: stw 3, +; CHECK-VSX: lfiwzx [[REG:[0-9]+]], +; CHECK-VSX: fcfidus 1, [[REG]] +; CHECK-VSX: blr } define double @goou(i32 %a) nounwind { @@ -78,5 +97,11 @@ entry: ; CHECK-A2: lfiwzx [[REG:[0-9]+]], ; CHECK-A2: fcfidu 1, [[REG]] ; CHECK-A2: blr + +; CHECK-VSX: @goou +; CHECK-VSX: stw 3, +; CHECK-VSX: lfiwzx [[REG:[0-9]+]], +; CHECK-VSX: xscvuxddp 1, [[REG]] +; CHECK-VSX: blr } |
