[PowerPC] Generate pre-increment floating-point ld/st instructions

PowerPC supports pre-increment floating-point load/store instructions, both r+r
and r+i, and we had patterns for them, but they were not marked as legal. Mark
them as legal (and add a test case).

llvm-svn: 228327

1 files changed, 40 insertions, 0 deletions

diff --git a/llvm/test/CodeGen/PowerPC/flt-preinc.ll b/llvm/test/CodeGen/PowerPC/flt-preinc.ll
new file mode 100644
index 00000000000..dd17031a6d9
--- /dev/null
+++ b/llvm/test/CodeGen/PowerPC/flt-preinc.ll
@@ -0,0 +1,40 @@
+; RUN: llc -mcpu=ppc64 < %s | FileCheck %s
+target datalayout = "E-m:e-i64:64-n32:64"
+target triple = "powerpc64-unknown-linux-gnu"
+
+; Function Attrs: nounwind readonly
+define float @tf(float* nocapture readonly %i, i32 signext %o) #0 {
+entry:
+  %idx.ext = sext i32 %o to i64
+  %add.ptr = getelementptr inbounds float* %i, i64 %idx.ext
+  %0 = load float* %add.ptr, align 4
+  %add.ptr.sum = add nsw i64 %idx.ext, 1
+  %add.ptr3 = getelementptr inbounds float* %i, i64 %add.ptr.sum
+  %1 = load float* %add.ptr3, align 4
+  %add = fadd float %0, %1
+  ret float %add
+
+; CHECK-LABEL: @tf
+; CHECK: lfsux
+; CHECK: blr
+}
+
+; Function Attrs: nounwind readonly
+define double @td(double* nocapture readonly %i, i32 signext %o) #0 {
+entry:
+  %idx.ext = sext i32 %o to i64
+  %add.ptr = getelementptr inbounds double* %i, i64 %idx.ext
+  %0 = load double* %add.ptr, align 8
+  %add.ptr.sum = add nsw i64 %idx.ext, 1
+  %add.ptr3 = getelementptr inbounds double* %i, i64 %add.ptr.sum
+  %1 = load double* %add.ptr3, align 8
+  %add = fadd double %0, %1
+  ret double %add
+
+; CHECK-LABEL: @td
+; CHECK: lfdux
+; CHECK: blr
+}
+
+attributes #0 = { nounwind readonly }
+