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| author | Eric Christopher <echristo@gmail.com> | 2015-07-24 01:07:50 +0000 |
|---|---|---|
| committer | Eric Christopher <echristo@gmail.com> | 2015-07-24 01:07:50 +0000 |
| commit | 1fb23395c3e49448d5965d43eb7958098051baf9 (patch) | |
| tree | 1e9a0606713aa3bea312e4d8ddf4d454e7e6ec55 /llvm/test/CodeGen/PowerPC/fast-isel-shifter.ll | |
| parent | 404c69f2c8c7f7d4993f80fb1f7390571ffe56b6 (diff) | |
| download | bcm5719-llvm-1fb23395c3e49448d5965d43eb7958098051baf9.tar.gz bcm5719-llvm-1fb23395c3e49448d5965d43eb7958098051baf9.zip | |
Clean up function attributes on PPC fast-isel tests.
llvm-svn: 243079
Diffstat (limited to 'llvm/test/CodeGen/PowerPC/fast-isel-shifter.ll')
| -rw-r--r-- | llvm/test/CodeGen/PowerPC/fast-isel-shifter.ll | 12 |
1 files changed, 6 insertions, 6 deletions
diff --git a/llvm/test/CodeGen/PowerPC/fast-isel-shifter.ll b/llvm/test/CodeGen/PowerPC/fast-isel-shifter.ll index c18f659dde1..04cb4192060 100644 --- a/llvm/test/CodeGen/PowerPC/fast-isel-shifter.ll +++ b/llvm/test/CodeGen/PowerPC/fast-isel-shifter.ll @@ -1,6 +1,6 @@ ; RUN: llc < %s -O0 -verify-machineinstrs -fast-isel-abort=1 -mtriple=powerpc64-unknown-linux-gnu -mcpu=pwr7 | FileCheck %s --check-prefix=ELF64 -define i32 @shl() nounwind ssp { +define i32 @shl() nounwind { entry: ; ELF64: shl ; ELF64: slw @@ -8,7 +8,7 @@ entry: ret i32 %shl } -define i32 @shl_reg(i32 %src1, i32 %src2) nounwind ssp { +define i32 @shl_reg(i32 %src1, i32 %src2) nounwind { entry: ; ELF64: shl_reg ; ELF64: slw @@ -16,7 +16,7 @@ entry: ret i32 %shl } -define i32 @lshr() nounwind ssp { +define i32 @lshr() nounwind { entry: ; ELF64: lshr ; ELF64: srw @@ -24,7 +24,7 @@ entry: ret i32 %lshr } -define i32 @lshr_reg(i32 %src1, i32 %src2) nounwind ssp { +define i32 @lshr_reg(i32 %src1, i32 %src2) nounwind { entry: ; ELF64: lshr_reg ; ELF64: srw @@ -32,7 +32,7 @@ entry: ret i32 %lshr } -define i32 @ashr() nounwind ssp { +define i32 @ashr() nounwind { entry: ; ELF64: ashr ; ELF64: srawi @@ -40,7 +40,7 @@ entry: ret i32 %ashr } -define i32 @ashr_reg(i32 %src1, i32 %src2) nounwind ssp { +define i32 @ashr_reg(i32 %src1, i32 %src2) nounwind { entry: ; ELF64: ashr_reg ; ELF64: sraw |
