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authorEric Christopher <echristo@gmail.com>2015-07-25 00:48:08 +0000
committerEric Christopher <echristo@gmail.com>2015-07-25 00:48:08 +0000
commitf0024d14f10564532eec392a7c468ad79143f6b0 (patch)
treed95d894a5f14f88e5d860cc86849c98852f2ea00 /llvm/test/CodeGen/PowerPC/fast-isel-ret.ll
parent03df7ac8a9788b2fdd6e30184adb689dafab8bdd (diff)
downloadbcm5719-llvm-f0024d14f10564532eec392a7c468ad79143f6b0.tar.gz
bcm5719-llvm-f0024d14f10564532eec392a7c468ad79143f6b0.zip
Fix PPCMaterializeInt to check the size of the integer based on the
extension property we're requesting - zero or sign extended. This fixes cases where we want to return a zero extended 32-bit -1 and not be sign extended for the entire register. Also updated the already out of date comment with the current behavior. llvm-svn: 243192
Diffstat (limited to 'llvm/test/CodeGen/PowerPC/fast-isel-ret.ll')
-rw-r--r--llvm/test/CodeGen/PowerPC/fast-isel-ret.ll10
1 files changed, 10 insertions, 0 deletions
diff --git a/llvm/test/CodeGen/PowerPC/fast-isel-ret.ll b/llvm/test/CodeGen/PowerPC/fast-isel-ret.ll
index eee4f313ee9..e05ef7d9ab8 100644
--- a/llvm/test/CodeGen/PowerPC/fast-isel-ret.ll
+++ b/llvm/test/CodeGen/PowerPC/fast-isel-ret.ll
@@ -176,3 +176,13 @@ entry:
; ELF64: blr
ret double 2.5e-33;
}
+
+define zeroext i32 @ret19() nounwind {
+entry:
+; ELF64-LABEL: ret19
+; ELF64: li
+; ELF64: oris
+; ELF64: ori
+; ELF64: blr
+ ret i32 -1
+}
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