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author | Nemanja Ivanovic <nemanja.i.ibm@gmail.com> | 2017-11-30 13:39:10 +0000 |
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committer | Nemanja Ivanovic <nemanja.i.ibm@gmail.com> | 2017-11-30 13:39:10 +0000 |
commit | db7e77047c2432742dd1dd26f3cc96ee180c9c34 (patch) | |
tree | ab15236c0d74712dec35f23b60f5a42b2fa65c26 /llvm/test/CodeGen/PowerPC/expand-isel.ll | |
parent | bb791b3dbdc009412c1a27b14b22091b15d3728b (diff) | |
download | bcm5719-llvm-db7e77047c2432742dd1dd26f3cc96ee180c9c34.tar.gz bcm5719-llvm-db7e77047c2432742dd1dd26f3cc96ee180c9c34.zip |
[PowerPC] Recommit r314244 with refactoring and off by default
This re-commits everything that was pulled in r314244. The transformation
is off by default (patch to enable it to follow). The code is refactored
to have a single entry-point and provide fine-grained control over patterns
that it selects. This patch also fixes the bugs in the original code.
Everything that failed with the original patch has been re-tested with this
patch (with the transformation turned on). So the patch to turn this on is
soon to follow.
Differential Revision: https://reviews.llvm.org/D38575
llvm-svn: 319434
Diffstat (limited to 'llvm/test/CodeGen/PowerPC/expand-isel.ll')
-rw-r--r-- | llvm/test/CodeGen/PowerPC/expand-isel.ll | 12 |
1 files changed, 7 insertions, 5 deletions
diff --git a/llvm/test/CodeGen/PowerPC/expand-isel.ll b/llvm/test/CodeGen/PowerPC/expand-isel.ll index 76479705f02..bae3c8912d6 100644 --- a/llvm/test/CodeGen/PowerPC/expand-isel.ll +++ b/llvm/test/CodeGen/PowerPC/expand-isel.ll @@ -1,7 +1,6 @@ -; XFAIL: * target datalayout = "E-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v128:128:128-n32:64" target triple = "powerpc64-unknown-linux-gnu" -; RUN: llc -verify-machineinstrs -O2 -ppc-asm-full-reg-names -mcpu=pwr7 -ppc-gen-isel=false < %s | FileCheck %s --implicit-check-not isel +; RUN: llc -ppc-gpr-icmps=all -verify-machineinstrs -O2 -ppc-asm-full-reg-names -mcpu=pwr7 -ppc-gen-isel=false < %s | FileCheck %s --implicit-check-not isel ; Function Attrs: norecurse nounwind readnone define signext i32 @testExpandISELToIfElse(i32 signext %i, i32 signext %j) { entry: @@ -213,9 +212,12 @@ cleanup: ret i32 %retval.0 ; CHECK-LABEL: @testComplexISEL -; CHECK-DAG: [[LI:r[0-9]+]], 1 -; CHECK-DAG: cmplwi [[LD:r[0-9]+]], 0 -; CHECK: bnelr cr0 +; CHECK: cmplwi r3, 0 +; CHECK: li r3, 1 +; CHECK: beq cr0, [[TGT:.LBB[0-9_]+]] +; CHECK: clrldi r3, r3, 32 +; CHECK: blr +; CHECK: [[TGT]] ; CHECK: xor [[XOR:r[0-9]+]] ; CHECK: cntlzd [[CZ:r[0-9]+]], [[XOR]] ; CHECK: rldicl [[SH:r[0-9]+]], [[CZ]], 58, 63 |