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| author | Andrea Di Biagio <Andrea_DiBiagio@sn.scee.net> | 2014-01-28 18:14:21 +0000 |
|---|---|---|
| committer | Andrea Di Biagio <Andrea_DiBiagio@sn.scee.net> | 2014-01-28 18:14:21 +0000 |
| commit | 2ea61f17ad77956d0a2e969a2085b480424d665c (patch) | |
| tree | 8ecef793550754001c0e3436818a6c5c644946ef /llvm/test/CodeGen/PowerPC/big-endian-actual-args.ll | |
| parent | c67655a7f4d16e47d0fb0b85daeda55330a21a69 (diff) | |
| download | bcm5719-llvm-2ea61f17ad77956d0a2e969a2085b480424d665c.tar.gz bcm5719-llvm-2ea61f17ad77956d0a2e969a2085b480424d665c.zip | |
[X86] Add extra rules for combining vselect dag nodes into movsd.
This improves the fix committed at revision 199683 adding the
following new target specific combine rules:
1) fold (v4i32: vselect <0,0,-1,-1>, A, B) ->
(v4i32 (bitcast (movsd (v2i64 (bitcast A)), (v2i64 (bitcast B))) ))
2) fold (v4f32: vselect <0,0,-1,-1>, A, B) ->
(v4f32 (bitcast (movsd (v2f64 (bitcast A)), (v2f64 (bitcast B))) ))
3) fold (v4i32: vselect <-1,-1,0,0>, A, B) ->
(v4i32 (bitcast (movsd (v2i64 (bitcast B)), (v2i64 (bitcast A))) ))
4) fold (v4f32: vselect <-1,-1,0,0>, A, B) ->
(v4f32 (bitcast (movsd (v2i64 (bitcast B)), (v2i64 (bitcast A))) ))
llvm-svn: 200324
Diffstat (limited to 'llvm/test/CodeGen/PowerPC/big-endian-actual-args.ll')
0 files changed, 0 insertions, 0 deletions
