[opaque pointer type] Add textual IR support for explicit type parameter to load instruction

Essentially the same as the GEP change in r230786.

A similar migration script can be used to update test cases, though a few more
test case improvements/changes were required this time around: (r229269-r229278)

import fileinput
import sys
import re

pat = re.compile(r"((?:=|:|^)\s*load (?:atomic )?(?:volatile )?(.*?))(| addrspace\(\d+\) *)\*($| *(?:%|@|null|undef|blockaddress|getelementptr|addrspacecast|bitcast|inttoptr|\[\[[a-zA-Z]|\{\{).*$)")

for line in sys.stdin:
  sys.stdout.write(re.sub(pat, r"\1, \2\3*\4", line))

Reviewers: rafael, dexonsmith, grosser

Differential Revision: http://reviews.llvm.org/D7649

llvm-svn: 230794

1 files changed, 4 insertions, 4 deletions

diff --git a/llvm/test/CodeGen/PowerPC/atomics-indexed.ll b/llvm/test/CodeGen/PowerPC/atomics-indexed.ll
index 910874ee7b1..b9ec3c669ba 100644
--- a/llvm/test/CodeGen/PowerPC/atomics-indexed.ll
+++ b/llvm/test/CodeGen/PowerPC/atomics-indexed.ll
@@ -13,7 +13,7 @@ define i8 @load_x_i8_seq_cst([100000 x i8]* %mem) {
 ; CHECK: lbzx
 ; CHECK: sync 1
   %ptr = getelementptr inbounds [100000 x i8], [100000 x i8]* %mem, i64 0, i64 90000
-  %val = load atomic i8* %ptr seq_cst, align 1
+  %val = load atomic i8, i8* %ptr seq_cst, align 1
   ret i8 %val
 }
 define i16 @load_x_i16_acquire([100000 x i16]* %mem) {
@@ -21,7 +21,7 @@ define i16 @load_x_i16_acquire([100000 x i16]* %mem) {
 ; CHECK: lhzx
 ; CHECK: sync 1
   %ptr = getelementptr inbounds [100000 x i16], [100000 x i16]* %mem, i64 0, i64 90000
-  %val = load atomic i16* %ptr acquire, align 2
+  %val = load atomic i16, i16* %ptr acquire, align 2
   ret i16 %val
 }
 define i32 @load_x_i32_monotonic([100000 x i32]* %mem) {
@@ -29,7 +29,7 @@ define i32 @load_x_i32_monotonic([100000 x i32]* %mem) {
 ; CHECK: lwzx
 ; CHECK-NOT: sync
   %ptr = getelementptr inbounds [100000 x i32], [100000 x i32]* %mem, i64 0, i64 90000
-  %val = load atomic i32* %ptr monotonic, align 4
+  %val = load atomic i32, i32* %ptr monotonic, align 4
   ret i32 %val
 }
 define i64 @load_x_i64_unordered([100000 x i64]* %mem) {
@@ -39,7 +39,7 @@ define i64 @load_x_i64_unordered([100000 x i64]* %mem) {
 ; PPC64: ldx
 ; CHECK-NOT: sync
   %ptr = getelementptr inbounds [100000 x i64], [100000 x i64]* %mem, i64 0, i64 90000
-  %val = load atomic i64* %ptr unordered, align 8
+  %val = load atomic i64, i64* %ptr unordered, align 8
   ret i64 %val
 }