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| author | Reid Spencer <rspencer@reidspencer.com> | 2007-02-02 02:16:23 +0000 |
|---|---|---|
| committer | Reid Spencer <rspencer@reidspencer.com> | 2007-02-02 02:16:23 +0000 |
| commit | 2341c22ec71aed773101eef6bc725df2047e5154 (patch) | |
| tree | 453d820479bbe83769e54e01abc702ac8ef71312 /llvm/test/CodeGen/PowerPC/and-elim.ll | |
| parent | 48b094d9ddbca690da41f5711d8e1fcb46c50e05 (diff) | |
| download | bcm5719-llvm-2341c22ec71aed773101eef6bc725df2047e5154.tar.gz bcm5719-llvm-2341c22ec71aed773101eef6bc725df2047e5154.zip | |
Changes to support making the shift instructions be true BinaryOperators.
This feature is needed in order to support shifts of more than 255 bits
on large integer types. This changes the syntax for llvm assembly to
make shl, ashr and lshr instructions look like a binary operator:
shl i32 %X, 1
instead of
shl i32 %X, i8 1
Additionally, this should help a few passes perform additional optimizations.
llvm-svn: 33776
Diffstat (limited to 'llvm/test/CodeGen/PowerPC/and-elim.ll')
| -rw-r--r-- | llvm/test/CodeGen/PowerPC/and-elim.ll | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/llvm/test/CodeGen/PowerPC/and-elim.ll b/llvm/test/CodeGen/PowerPC/and-elim.ll index b7fe9d2fb26..958f1552513 100644 --- a/llvm/test/CodeGen/PowerPC/and-elim.ll +++ b/llvm/test/CodeGen/PowerPC/and-elim.ll @@ -3,7 +3,7 @@ define void @test(i8* %P) { %W = load i8* %P - %X = shl i8 %W, i8 1 + %X = shl i8 %W, 1 %Y = add i8 %X, 2 %Z = and i8 %Y, 254 ; dead and store i8 %Z, i8* %P @@ -12,7 +12,7 @@ define void @test(i8* %P) { define i16 @test2(i16 zext %crc) zext { ; No and's should be needed for the i16s here. - %tmp.1 = lshr i16 %crc, i8 1 + %tmp.1 = lshr i16 %crc, 1 %tmp.7 = xor i16 %tmp.1, 40961 ret i16 %tmp.7 } |
