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| author | Jakob Stoklund Olesen <stoklund@2pi.dk> | 2011-04-04 17:57:26 +0000 |
|---|---|---|
| committer | Jakob Stoklund Olesen <stoklund@2pi.dk> | 2011-04-04 17:57:26 +0000 |
| commit | 8296e306271f3c17a98022548f1549a0675f3bd8 (patch) | |
| tree | 6d7a031f6aaf4cd183617f9cf301aa14aa19459e /llvm/test/CodeGen/PowerPC/Atomics-64.ll | |
| parent | 66c1c59bdbc8f1a24d9308266adbd7918ed29b76 (diff) | |
| download | bcm5719-llvm-8296e306271f3c17a98022548f1549a0675f3bd8.tar.gz bcm5719-llvm-8296e306271f3c17a98022548f1549a0675f3bd8.zip | |
Disable the PowerPC/Atomics-64 test.
The code inserted by PPCTargetLowering::EmitInstrWithCustomInserter for ppc64 is
wrong, and I don't know how to fix it. It seems to be using the correct register
classes for pointers, but it inserts all 32-bit instructions.
llvm-svn: 128835
Diffstat (limited to 'llvm/test/CodeGen/PowerPC/Atomics-64.ll')
| -rw-r--r-- | llvm/test/CodeGen/PowerPC/Atomics-64.ll | 10 |
1 files changed, 8 insertions, 2 deletions
diff --git a/llvm/test/CodeGen/PowerPC/Atomics-64.ll b/llvm/test/CodeGen/PowerPC/Atomics-64.ll index 1dc4310761c..cfc1eb98e06 100644 --- a/llvm/test/CodeGen/PowerPC/Atomics-64.ll +++ b/llvm/test/CodeGen/PowerPC/Atomics-64.ll @@ -1,5 +1,11 @@ -; RUN: llc < %s -march=ppc64 -; ModuleID = 'Atomics.c' +; RUN: llc < %s -march=ppc64 -verify-machineinstrs +; +; This test is disabled until PPCISelLowering learns to insert proper 64-bit +; code for ATOMIC_CMP_SWAP. Currently, it is inserting 32-bit instructions with +; 64-bit operands which causes the machine code verifier to throw a tantrum. +; +; XFAIL: * + target datalayout = "E-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f128:64:128" target triple = "powerpc64-apple-darwin9" @sc = common global i8 0 ; <i8*> [#uses=52] |
