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| author | David Blaikie <dblaikie@gmail.com> | 2015-02-27 21:17:42 +0000 |
|---|---|---|
| committer | David Blaikie <dblaikie@gmail.com> | 2015-02-27 21:17:42 +0000 |
| commit | a79ac14fa68297f9888bc70a10df5ed9b8864e38 (patch) | |
| tree | 8d8217a8928e3ee599bdde405e2e178b3a55b645 /llvm/test/CodeGen/PowerPC/2008-03-24-AddressRegImm.ll | |
| parent | 83687fb9e654c9d0086e7f6b728c26fa0b729e71 (diff) | |
| download | bcm5719-llvm-a79ac14fa68297f9888bc70a10df5ed9b8864e38.tar.gz bcm5719-llvm-a79ac14fa68297f9888bc70a10df5ed9b8864e38.zip | |
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
Essentially the same as the GEP change in r230786.
A similar migration script can be used to update test cases, though a few more
test case improvements/changes were required this time around: (r229269-r229278)
import fileinput
import sys
import re
pat = re.compile(r"((?:=|:|^)\s*load (?:atomic )?(?:volatile )?(.*?))(| addrspace\(\d+\) *)\*($| *(?:%|@|null|undef|blockaddress|getelementptr|addrspacecast|bitcast|inttoptr|\[\[[a-zA-Z]|\{\{).*$)")
for line in sys.stdin:
sys.stdout.write(re.sub(pat, r"\1, \2\3*\4", line))
Reviewers: rafael, dexonsmith, grosser
Differential Revision: http://reviews.llvm.org/D7649
llvm-svn: 230794
Diffstat (limited to 'llvm/test/CodeGen/PowerPC/2008-03-24-AddressRegImm.ll')
| -rw-r--r-- | llvm/test/CodeGen/PowerPC/2008-03-24-AddressRegImm.ll | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/llvm/test/CodeGen/PowerPC/2008-03-24-AddressRegImm.ll b/llvm/test/CodeGen/PowerPC/2008-03-24-AddressRegImm.ll index 7d056da1e0c..1191748b87d 100644 --- a/llvm/test/CodeGen/PowerPC/2008-03-24-AddressRegImm.ll +++ b/llvm/test/CodeGen/PowerPC/2008-03-24-AddressRegImm.ll @@ -6,7 +6,7 @@ entry: %tmp28 = and i64 %tmp2627, -16384 ; <i64> [#uses=2] %tmp2829 = inttoptr i64 %tmp28 to i8* ; <i8*> [#uses=1] %tmp37 = getelementptr i8, i8* %tmp2829, i64 42 ; <i8*> [#uses=1] - %tmp40 = load i8* %tmp37, align 1 ; <i8> [#uses=1] + %tmp40 = load i8, i8* %tmp37, align 1 ; <i8> [#uses=1] %tmp4041 = zext i8 %tmp40 to i64 ; <i64> [#uses=1] %tmp42 = shl i64 %tmp4041, 8 ; <i64> [#uses=1] %tmp47 = add i64 %tmp42, 0 ; <i64> [#uses=1] |
