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| author | Richard Sandiford <rsandifo@linux.vnet.ibm.com> | 2013-07-11 09:10:09 +0000 |
|---|---|---|
| committer | Richard Sandiford <rsandifo@linux.vnet.ibm.com> | 2013-07-11 09:10:09 +0000 |
| commit | ea9b6aa20bf8bd83eddff1b788c33183ea5bbffa (patch) | |
| tree | e2968b926195711a6c0672d279761fb672c14065 /llvm/test/CodeGen/PowerPC/2008-02-05-LiveIntervalsAssert.ll | |
| parent | 84f54a3bc9067cf9b48584d3da4e71049c490cac (diff) | |
| download | bcm5719-llvm-ea9b6aa20bf8bd83eddff1b788c33183ea5bbffa.tar.gz bcm5719-llvm-ea9b6aa20bf8bd83eddff1b788c33183ea5bbffa.zip | |
[SystemZ] Use zeroing form of RISBG for shift-and-AND sequences
Extend r186072 to handle shifts and ANDs.
llvm-svn: 186073
Diffstat (limited to 'llvm/test/CodeGen/PowerPC/2008-02-05-LiveIntervalsAssert.ll')
0 files changed, 0 insertions, 0 deletions
